Abstract: The disclosure belongs to the technical field of batteries, and particularly relates to a current collector component, which includes a first current collector piece, a second current collector piece, and an insulator, the first current collector piece and the second current collector piece being in insulated connection through an insulator; the second current collector piece includes a body part and a welding part, the body part and the welding part forming an included angle, and a welding surface of the welding part and a surface of the body part forming an included angle. The structure of the disclosure has high welding safety, may increase the utilization rate of the internal space of a housing, and may prevent the damage to a cell caused by laser penetration welding. In addition, the disclosure further discloses a secondary battery.

Abstract: Disclosed is a display panel including: first spacer on the array substrate, an orthographic projection of the first spacer on the array substrate being a first pattern extending along a first direction; a second spacer on the counter substrate, an orthographic projection of the second spacer on the array substrate being a second pattern extending along a second direction; at least two third spacers, orthographic projections of which on the array substrate being respectively on two sides of the first pattern along the first direction; at least two fourth spacers, orthographic projections of which on the array substrate being respectively on two sides of the second pattern along the second direction; one of the third spacer and the fourth spacer is on the array substrate, and the other is on the counter substrate.

Abstract: Systems and methods for simulating subterranean regions having multi-scale, complex fracture geometries in a realistic simulation environment, which includes in the modeling process three-dimensional multi-scale rock discontinuities, hydraulic fractures, and heterogenous reservoir properties. Non-intrusive embedded discrete fracture modeling formulations are applied in conjunction with commercial or in-house simulators to efficiently and accurately model subsurface characteristics including three-dimensional geometries having combinations of complex hydraulic fractures and multi-scale rock discontinuities.

Abstract: Systems, apparatuses, methods, and computer-readable media are provided for user equipment (UE) idle mode operations. In embodiments, a UE wakes up more than once during a Discontinuous Reception (DRX) cycle. Inter-frequency measurement requirements may be relaxed based on DRX cycle length. Some embodiments include radiofrequency (RF) circuitry warm-up overhead reduction by on-duration separation with RF circuitry switching pattern adaption. Some embodiments include and RF circuitry warm-up overhead reduction by adaptive synchronization signal block (SSB) reference symbol down-selection. Other embodiments may be described and/or claimed.

Abstract: The disclosure provides the use of a plant in the preparation of medicines and health products for preventing and treating ovarian injury. The application found that seabuckthorn fruit pulp and seabuckthorn seed oil have good preventive and therapeutic effects on ovarian injury. Seabuckthorn fruit pulp and seabuckthorn seed oil can prevent mouse ovarian injury and estrus cycle disorders, and can improve ovarian reserve, etc. Meanwhile, they also have good therapeutic effects on the above-mentioned injuries. This application provides a basis for the prevention and treatment of ovarian injury directly by seabuckthorn fruit pulp and seabuckthorn seed oil.

Abstract: An electronic device including a first panel and a second panel overlapped with the first panel is provided. The first panel includes a substrate, a first medium layer, a first electrode layer and a second electrode layer. The first medium layer is disposed on the substrate. The first electrode layer is disposed between the substrate and the first medium layer. The second electrode layer is disposed between the first electrode layer and the first medium layer. A first voltage is applied to the first electrode layer, a second voltage is applied to the second electrode layer, and the first voltage is different from the second voltage.

Abstract: The present disclosure provides an electronic device including a first sensing circuit, a second sensing circuit and a power line. The first sensing circuit includes a first sensing unit and a first transistor, and a first end of the first sensing unit is coupled to a control end of the first transistor. The second sensing circuit includes a second sensing unit and a second transistor, and a first end of the second sensing unit is coupled to a control end of the second transistor. A first end of the first transistor and a first end of the second transistor are coupled to the power line.

Abstract: A support device includes a support structure, a carrier assembly, and an elastic assembly. The carrier assembly is configured to support a display device. The carrier assembly ascends and descends relative to the support structure. The elastic assembly is connected to the support structure and the carrier assembly and provides different support forces to the carrier assembly to support display devices of different weights.

Abstract: An antenna module includes: a first insulation medium substrate, including a first section provided with a first groove and a second section, where an integrated circuit is disposed in the first groove; a flexible substrate including a conductive structure, where the flexible substrate is stacked on the first insulation medium substrate, and a part that is of the flexible substrate and that is located between the first section and the second section is bendable; and an antenna structure, including a first metal structure that is disposed on the first section and that is connected to the conductive structure and the integrated circuit, and a second metal structure that is disposed on the second section and that is connected to the conductive structure. This avoids a warping problem caused by different thermal expansion coefficients of a plastic packaging material and a substrate, and reduces a risk of product failure.

Abstract: The present disclosure provides an antenna packaging module and the making method. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a third packaging layer, and a packaging antenna connector to an external circuit board. The antenna structure includes a connector opening and at least a first antenna structure and a second antenna structure stacked on one surface of the redistribution layer. The packaging antenna connector is designed in the connector opening and is electrically connected to the redistribution layer. Electrical terminals are provided through the packaging antenna connector disposed in the connector opening, thus reducing the antenna signal loss. The antenna packaging module requires neither any metal wire ends electrically connected to redistribution layer, nor a flip-chip process.

Abstract: An electronic device includes a substrate including an active area and a peripheral area adjacent to the active area; a plurality of spacers disposed in the active area and including a first spacer and a second spacer; a plurality of signal lines disposed on the substrate and extending along a first direction; a plurality of gate lines disposed on the substrate and extending along a second direction; and a gate driving unit disposed in the active area and including a receiving switch element and a buffer switch element, wherein the receiving switch element is disposed corresponding to the first spacer and receives an input signal through one of the signal lines, and the buffer switch element is disposed corresponding to the second spacer and is electrically connected to the receiving switch element, wherein the buffer switch element outputs a scan signal to one of the gate lines.

Abstract: The application describes an antenna packaging module for a semiconductor chip and a method for making it. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a metal bump, a third packaging layer and a packaging antenna connector. The antenna structure comprises a connector opening, a first antenna structure and a second antenna structure stacked on the second surface of the redistribution layer. The packaging antenna connector is disposed in the connector opening, and is electrically connected to the redistribution layer. Electrical interconnection of packaging an antenna connector in a connector opening in the packaging layer, the antenna signal loss is reduced, and the overall e advantage of WLP AiP is further improved.

Abstract: The present invention proposes an O-band silicon-based high-speed semiconductor laser diode for optical communication and its manufacturing method, by using different buffer layers to form the growth surface of InP material with low dislocation density; N—InAlGaAs is used instead of conventional N—InAlAs electron-blocking layer in the epi-structure to reduce the barrier for electrons to enter the quantum wells from N-type and lower the threshold; a superlattice structure quantum barrier is used instead of a single layer barrier structure to improve the transport of heavy holes in the quantum wells; and the material structure is adjusted to achieve a reliable O-band high direct modulation speed semiconductor laser diode for optical communication on silicon substrate.

Abstract: A time-to-digital converter (TDC) is disclosed, which comprises a ring oscillator module and a digital error correction module. The ring oscillator module is configured to receive a sampling signal, an addressing signal, and a preset signal, and includes: a ring oscillator arranged with a plurality of inverters; a phase sampler configured to sample phase signals generated by the inverters for generating a first output signal; a counter clock generator configured to generate first and second clock signals; first and second counters configured to respectively generate first and second counter output signals; and a data sampler configured to sample the first and second counter output signals to respectively generate second and third output signals. The digital error correction module is arranged to process the first, second and third output signals for generating a digital signal.

Abstract: A method for processing signals or data liable to interference arising from the sharing of channels in multi-user transmissions is applied to a base station apparatus. The base station apparatus receives a codeword from a terminal apparatus, and decodes the received codeword using a parity check matrix. The base station apparatus 110 can determine whether interference exists in a signal or data by analyzing the received codeword, and terminates a decoding of the received codeword if interference is found.

Abstract: The application describes an antenna packaging module for a semiconductor chip and a method for making it. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a metal bump, a third packaging layer and a packaging antenna connector. The antenna structure comprises a connector opening, a first antenna structure and a second antenna structure stacked on the second surface of the redistribution layer. The packaging antenna connector is disposed in the connector opening, and is electrically connected to the redistribution layer. Electrical interconnection of packaging an antenna connector in a connector opening in the packaging layer, the antenna signal loss is reduced, and the overall e advantage of WLP AiP is further improved.

Abstract: The present disclosure provides an antenna packaging module and the making method. The antenna packaging module comprises a redistribution layer, an antenna structure, a semiconductor chip, a third packaging layer, and a packaging antenna connector to an external circuit board. The antenna structure includes a connector opening and at least a first antenna structure and a second antenna structure stacked on one surface of the redistribution layer. The packaging antenna connector is designed in the connector opening and is electrically connected to the redistribution layer. Electrical terminals are provided through the packaging antenna connector disposed in the connector opening, thus reducing the antenna signal loss. The antenna packaging module requires neither any metal wire ends electrically connected to redistribution layer, nor a flip-chip process.

Abstract: The present invention provides a hexa-lactoside-triazanonane triacetic acid (NOTA) derivative, a method for radiolabeling a hexa-lactoside positron emission tomography (PET) imaging agent for a liver receptor with Ga-68, and a hexa-lactoside PET imaging agent for a liver receptor. The hexa-lactoside-NOTA derivative is a conjugate of six chains of lactose with NOTA obtained by conjugating hexa-lactoside to a chelating agent p-thiocyanate-benzyl-triazanonane diacetic acid-glutamic acid in the presence of triethyl amine/dimethyl formamide as a solvent. The radiolabeling method comprises labeling with Ga-68 at room temperature. According to the present invention, the labeling effect is stable, the labeling efficiency of the labeled product is greater than 95%, the labeled product is highly stable and the radiochemical purity is still greater than 90% after 4 hours.

Abstract: A digital-to-time converter (DTC) assisted all digital phase locked loop (ADPLL) circuit is disclosed, which comprises: a DTC error compensator arranged to receive a phase offset signal being a processed output from a time-to-digital converter (TDC) circuit, the phase offset signal includes a DTC error corresponding to a phase difference between a reference clock signal processed by a DTC circuit and a feedback clock signal derived from an output signal of the ADPLL circuit. The compensator is arranged to process the phase offset signal for generating a digital signal representative of the DTC error, which is provided as an output signal. Also, the output signal is arranged to be subtracted from the phase offset signal to obtain a phase rectified signal of the phase offset signal.