Abstract: A method and an apparatus for concomitance scheduling a work thread and assistant threads associated with the work thread in a multi-threading processor system. The method includes: searching one or more assistant threads associated with the running of the work thread when preparing to run/schedule the work thread; running the one or more assistant threads that are searched; and running the work thread after all of the one or more assistant threads associated with the running of the work thread have run.

Abstract: An apparatus and method for managing a translation look-aside buffer (TLB). The TLB is shared by a plurality of jobs. The method including the steps of: obtaining at least one attribute of each job of the plurality of jobs; assigning a priority level to each job according to at least one attribute of each job; and managing the related TLB entries of each job according to the priority level of each job. The present invention also provides an apparatus for managing TLB corresponding to the above method. The method and apparatus according to the present invention provide an efficient use of the shared TLB.

Abstract: Provided is a hardware accelerator, central processing unit, and computing device. A hardware accelerator includes a task accelerating unit configured to, in response to a request for a new task issued by a hardware thread, accelerate the processing of the new task and produce a processing result for the task; a task time prediction unit configured to predict the total waiting time of the new task for returning to a specified address associated with the hardware thread. One aspect of this disclosure makes the hardware thread aware of the time to be waited for before getting a processing result, facilitating its task planning accordingly.

Abstract: Provided is a hardware accelerator and method, central processing unit, and computing device. A hardware accelerating method includes, in response to a request for a new task issued by a hardware thread, accelerating processing of the new task and producing a processing result for the task. A predicting step predicts total waiting time of the new task for returning to a specified address associated with the hardware thread.

Abstract: A method and apparatus are provided for hardware-assisted local triangle counting in a graph. The method includes converting vertex relationships of the graph into rule patterns. The method also includes compiling the rule patterns into a binary file, wherein the rule patterns are organized into a finite state machine. The method further includes loading at least a part of the binary file and a search string to be compared there against into a hardware pattern matching accelerator. The method additionally includes receiving a number of matching outputs from the pattern matching accelerator.

Abstract: A method and apparatus are provided for hardware-assisted local triangle counting in a graph. The method includes converting vertex relationships of the graph into rule patterns. The method also includes compiling the rule patterns into a binary file, wherein the rule patterns are organized into a finite state machine. The method further includes loading at least a part of the binary file and a search string to be compared there against into a hardware pattern matching accelerator. The method additionally includes receiving a number of matching outputs from the pattern matching accelerator.

Abstract: A system, method, and computer readable article of manufacture for sharing buffer management. The system includes: a predictor module to predict at runtime a transaction data size of a transaction according to history information of the transaction; and a resource management module to allocate sharing buffer resources for the transaction according to the predicted transaction data size in response to beginning of the transaction, to record an actual sharing buffer size occupied by the transaction in response to the successful commitment of the transaction, and to update the history information of the transaction.

Abstract: A method and system for sampling input data. The method includes: buffering input data; recording an execution path of the buffered input data in an online operation module; determining whether the buffered input data passes through a desired execution path, and responsive to the buffered input data passing through the desired execution path, sampling the buffered input data to a data set. The system includes: buffering means for buffering input data; recording means for recording an execution path; sampling means for determining whether the buffered input data passes through a desired execution path.

Abstract: A method, a memory controller and a processor architecture for protecting an application in a memory are disclosed. The application is cached as memory lines according to a size of a cache line. For example, the method comprises: in response to a load access request from a processor, reading from the memory a flagged memory line and an ECC checksum corresponding to the memory line, wherein the flagged memory line is obtained by performing a logic operation on a predetermined bit of the memory line and a flag bit for identifying the memory line; performing an ECC check on the flagged memory line by using the ECC checksum to obtain a value of the flag bit of the memory line; restoring the flagged memory line to the memory line according to the value of the flag bit; and determining whether or not to load the memory line according to the value of the flag bit and the type of the load access request from the processor.

Abstract: The present invention relates to a method in the field of shellfish breeding techniques, for breeding a scallop population that have improved carotenoid content in the orange-red adductor muscles or other muscle tissues. This method includes the steps of selecting the rare individuals that have orange-red adductor muscles from natural scallop populations, growing the selected scallops, inducing the reproduction, artificially fertilization, and finally breeding a scallop population with orange-red adductor muscles which can be expanded for the cultivation on a large scale. Comparing to other known breeding methods, the present method does not use transgenic technologies to include introduce any exogenous genes, thus does not have any bio-safety and ethics issues. All the mutant scallops with orange-red adductor muscles are selected from natural or cultivated populations. After breeding for four generations, the obtained scallops have abundant carotenoid ingredients in their orange-red adductor muscles.

Abstract: A computer-implemented method, an accelerator hardware unit, and an article of manufacture for supporting virtual machine migration. The method includes: acquiring a task request from a task queue of an accelerator hardware unit; extracting identification information of a related virtual machine from the task request; determining whether the identification information of the related virtual machine matches the identification information of a virtual machine to be migrated, where the identification information of a virtual machine to be migrated is recorded in a virtual machine identification information table; and deleting the task request from the task queue if the extracted identification information matches the identification information of a virtual machine to be migrated.

Abstract: A processing unit coupled to a bus for accelerating data transmission and a method for accelerating data transmission. The present invention provides a streaming data transmission mode in which a plurality of data blocks are transmitted via one handshake. The present invention employs handshake save policy, when a processing unit sends a request comprising a plurality of data blocks on a bus, a cache or memory will perform address matching to judge whether there is any hit data block. If there is any hit data block, the cache or memory only needs to reply once and then start to continuously transmit the hit data blocks it possesses. Thus, a separate handshake for each data block is no longer needed.

Abstract: A method and apparatus for lock allocation control. When a processor core acquires a lock, other processor cores do not need to constantly poll memory to check whether the required lock is released. Instead, other processor cores will be in sleep state and the next processor core needed will be selectively woken up based on predetermined rule, such that an out-of-order lock contention procedure is turned into an in-order lock allocation procedure. By selectively waking up a processor core that is in sleep state, the method and apparatus can avoid occupying a large amount of bus bandwidth, can avoid cache misses, and can save power consumption of chip.

Abstract: One embodiment of a method for constructing executable code for a component-based application includes receiving a request to compile source code for the component-based application, wherein the request identifies the source code, and wherein the source code comprises a plurality of source code components, each of the source code components implementing a different component of the application, and performing a series of steps for each source code component where the series of steps includes: deriving a signature for the source code component, retrieving a stored signature corresponding to a currently available instance of executable code for the source code component, comparing the derived signature with the stored signature, compiling the source code component into the executable code when the derived signature does not match the stored signature, and obtaining the executable code for the source code component from a repository when the derived signature matches the stored signature.

Abstract: A method and system for sampling input data. The method includes: buffering input data; recording an execution path of the buffered input data in an online operation module; determining whether the buffered input data passes through a desired execution path, and responsive to the buffered input data passing through the desired execution path, sampling the buffered input data to a data set. The system includes: buffering means for buffering input data; recording means for recording an execution path; sampling means for determining whether the buffered input data passes through a desired execution path.

Abstract: An apparatus and method for managing a translation look-aside buffer (TLB). The TLB is shared by a plurality of jobs. The method including the steps of: obtaining at least one attribute of each job of the plurality of jobs; assigning a priority level to each job according to at least one attribute of each job; and managing the related TLB entries of each job according to the priority level of each job. The present invention also provides an apparatus for managing TLB corresponding to the above method. The method and apparatus according to the present invention provide an efficient use of the shared TLB.

Abstract: The present invention provides a method, apparatus and article of manufacture, for fast context saving in transactional memory. The method creates a mapping table that includes entries corresponding to architectural registers. Each entry includes a physical register index and shadow bit of a first physical register mapped to an architectural register. In response to a detection that an update occurs to an architectural register in a transaction and its shadow bit being an invalid value, the method sets the shadow bit to be a valid value and sets a shadow register for the architectural register using the physical register index of the first physical register. The method maps a second physical register to the shadow register in order to save a modified value generated by an update process and saves the original value before the update process by use of the first physical register corresponding to the architecture register.

Abstract: A system, method, and computer readable article of manufacture for sharing buffer management. The system includes: a predictor module to predict at runtime a transaction data size of a transaction according to history information of the transaction; and a resource management module to allocate sharing buffer resources for the transaction according to the predicted transaction data size in response to beginning of the transaction, to record an actual sharing buffer size occupied by the transaction in response to the successful commitment of the transaction, and to update the history information of the transaction.

Abstract: Apparatus and methods are provided for controlling the loading status of DLLs. Specifically, a streaming program compiler is provided. The compiler includes operation modules for calling DLLs during streaming program execution; association table generating units for generating association tables according to user-defined rules, where the association table includes entries indicating (i) stream branches of the streaming program and (ii) an operation module corresponding to the stream branches; and a trigger generating unit for generating a trigger based on user-defined rules, where the trigger generating unit (i) determines which conditions for loading and unloading DLLs fit the streaming program, (ii) matches these conditions to a particular stream branch to identify a matched stream branch, and (iii) sends out triggering signals indicating the matched stream branch. This invention also provides a corresponding method and controller.

Abstract: A method of reading code symbols using a digital image capture and processing system which includes: an image formation and detection subsystem; an illumination subsystem; an illumination control subsystem; a digital image processing subsystem; and an input/output subsystem; and a system control subsystem. In the illustrative embodiment, a micro-computing platform implements the digital image processing subsystem, the input/output subsystem and the system control subsystem. The micro-computing platform includes a microprocessor, a memory architecture, and a multi-tier modular software architecture responsive to the generation of a triggering event within the system. Triggering events can be generated by an automatic object detector or by a manually actuated trigger switch.