Abstract: In a manufacturing method for an LDMOS integrated device, a provided semiconductor substrate has an NLDMOS area and a PLDMOS area; then a dielectric layer on the NLDMOS area and a dielectric layer on the PLDMOS area are formed on the semiconductor substrate, and a stress material layer is formed on the dielectric layer on the NLDMOS area and/or on the dielectric layer on the PLDMOS area, the thickness of the dielectric layer on the NLDMOS region being greater than the thickness of the dielectric layer on the PLDMOS region; then heat treatment is performed to adjust the stress of the stress material layer, so as to improve the electron mobility of a device; then the stress material layer is removed.

Abstract: A semiconductor device and a manufacturing method therefor are disclosed. The method includes: providing a substrate of a first conductivity type; forming doped regions of a second conductivity type in the substrate, the doped regions including adjacent first and second drift regions, wherein the second conductivity type is opposite to the first conductivity type; forming a polysilicon film on the substrate, the polysilicon film covering the doped regions; forming patterned photoresist on the polysilicon film, which covers the first and second drift regions, and in which the polysilicon film above a reserved region for a body region between the first and second drift regions is exposed; and forming the body region of the first conductivity type in the reserved region by performing a high-energy ion implantation process, the body region having a top surface that is flush with top surfaces of the doped regions, the body region having a bottom surface that is not higher than bottom surfaces of the doped regions.