Patents by Inventor Ruifeng Guo

Ruifeng Guo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080250284
    Abstract: A dictionary-based scan chain fault detector includes a dictionary with fault signatures computed for scan cells in the scan chain. Entries in the fault dictionary are compared with failures in the failure log to identify a faulty scan cell. In one embodiment a single fault in a scan chain is identified. In another embodiment, a last fault and a first fault in a scan chain are identified.
    Type: Application
    Filed: June 13, 2007
    Publication date: October 9, 2008
    Inventors: Ruifeng Guo, Yu Huang, Wu-Tung Cheng
  • Publication number: 20080215943
    Abstract: Embodiments of the disclosed technology comprise software-based techniques that can be used to improve scan chain test pattern generation and scan chain failure diagnosis resolution. For example, certain embodiments can be used to generate high quality chain diagnosis test patterns that are able to isolate a scan chain defect to a single scan cell. Such embodiments can be used to generate a “complete” test set—that is, a set of chain diagnosis test patterns that is able to isolate any scan chain defect in a faulty scan chain to a single scan cell.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 4, 2008
    Inventors: Ruifeng Guo, Yu Huang, Wu-Tung Cheng
  • Publication number: 20080040637
    Abstract: Technologies disclosed herein can be used to diagnose defects on die having both scan chain and system logic defects, including in situations where the presence of one or more faults in the system logic potentially obscures the detectability of one or more faults in the scan chains (or channels) and vice versa. At least some embodiments employ an iterative approach where at least some scan chain faults are identified, these chain faults are used to identify system logic faults, and then additional chain faults are identified using the system logic faults and vice versa. Failing bits can be partitioned into at least two groups: failing bits determined as being caused by system logic failures, and failing bits determined as being possibly caused by chain defects, system logic defects, or the compound effects of both types of defects.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 14, 2008
    Inventors: Yu Huang, Wu-Tung Cheng, Ruifeng Guo