Patents by Inventor Ruijin Wu
Ruijin Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210097013Abstract: A chiplet system includes a central processing unit (CPU) communicably coupled to a first GPU chiplet of a GPU chiplet array. The GPU chiplet array includes the first GPU chiplet communicably coupled to the CPU via a bus and a second GPU chiplet communicably coupled to the first GPU chiplet via an active bridge chiplet. The active bridge chiplet is an active silicon die that bridges GPU chiplets and allows partitioning of systems-on-a-chip (SoC) functionality into smaller functional chiplet groupings.Type: ApplicationFiled: September 27, 2019Publication date: April 1, 2021Inventors: Skyler J. SALEH, Ruijin WU
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Publication number: 20210089423Abstract: A technique for operating a processor that includes multiple cores is provided. The technique includes determining a number of active applications, selecting a processor configuration for the processor based on the number of active applications, configuring the processor according to the selected processor configuration, and executing the active applications with the configured processor.Type: ApplicationFiled: June 26, 2020Publication date: March 25, 2021Applicant: Advanced Micro Devices, Inc.Inventors: Ruijin Wu, Skyler Jonathon Saleh, Vineet Goel
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Patent number: 10783694Abstract: A pipeline is configured to access a memory that stores a texture block and metadata that encodes compression parameters of the texture block and a residency status of the texture block. A processor requests access to the metadata in conjunction with requesting data in the texture block to perform a shading operation. The pipeline selectively returns the data in the texture block to the processor depending on whether the metadata indicates that the texture block is resident in the memory. A cache can also be included to store a copy of the metadata that encodes the compression parameters of the texture block. The residency status and the metadata stored in the cache can be modified in response to requests to access the metadata stored in the cache.Type: GrantFiled: August 25, 2017Date of Patent: September 22, 2020Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Maxim V. Kazakov, Skyler J. Saleh, Ruijin Wu, Sagar Shankar Bhandare
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Patent number: 10706609Abstract: Described herein is a technique for performing ray-triangle intersection without a floating point division unit. A division unit would be useful for a straightforward implementation of a certain type of ray-triangle intersection test that is useful in ray tracing operations. This certain type of ray-triangle intersection test includes a step that transforms the coordinate system into the viewspace of the ray, thereby reducing the problem of intersection to one of 2D triangle rasterization. However, a straightforward implementation of this transformation requires floating point division, as the transformation utilizes a shear operation to set the coordinate system such that the magnitudes of the ray direction on two of the axes are zero. Instead of using the most straightforward implementation of this transform, the technique described herein scales the entire coordinate system by the magnitude of the ray direction in the axis that is the denominator of the shear ratio, removing division.Type: GrantFiled: December 13, 2018Date of Patent: July 7, 2020Assignee: Advanced Micro Devices, Inc.Inventors: Skyler Jonathon Saleh, Ruijin Wu
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Publication number: 20200193685Abstract: Described herein is a technique for performing ray-triangle intersection test in a manner that produces watertight results. The technique involves translating the coordinates of the triangle such that the origin is at the origin of the ray. The technique involves projecting the coordinate system into the viewspace of the ray. The technique then involves calculating barycentric coordinates and interpolating the barycentric coordinates to get a time of intersect. The signs of the barycentric coordinates indicate whether a hit occurs. The above calculations are performed with a non-directed floating point rounding mode to provide watertightness. A non-directed rounding mode is one in which the mantissa of a rounded number is rounded in a manner that is not dependent on the sign of the number.Type: ApplicationFiled: December 13, 2018Publication date: June 18, 2020Applicant: Advanced Micro Devices, Inc.Inventors: Skyler Jonathon Saleh, Ruijin Wu
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Publication number: 20200193684Abstract: Described herein is a technique for performing ray-triangle intersection without a floating point division unit. A division unit would be useful for a straightforward implementation of a certain type of ray-triangle intersection test that is useful in ray tracing operations. This certain type of ray-triangle intersection test includes a step that transforms the coordinate system into the viewspace of the ray, thereby reducing the problem of intersection to one of 2D triangle rasterization. However, a straightforward implementation of this transformation requires floating point division, as the transformation utilizes a shear operation to set the coordinate system such that the magnitudes of the ray direction on two of the axes are zero. Instead of using the most straightforward implementation of this transform, the technique described herein scales the entire coordinate system by the magnitude of the ray direction in the axis that is the denominator of the shear ratio, removing division.Type: ApplicationFiled: December 13, 2018Publication date: June 18, 2020Applicant: Advanced Micro Devices, Inc.Inventors: Skyler Jonathon Saleh, Ruijin Wu
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Publication number: 20200111248Abstract: A technique for compressing an original image is disclosed. According to the technique, an original image is obtained and a delta-encoded image is generated based on the original image. Next, a segregated image is generated based on the delta-encoded image and then the segregated image is compressed to produce a compressed image. The segregated image is generated because the segregated image may be compressed more efficiently than the original image and the delta image.Type: ApplicationFiled: December 6, 2019Publication date: April 9, 2020Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ruijin Wu, Skyler Jonathon Saleh, Christopher J. Brennan, Kei Ming Kwong, Anthony Hung-Cheong Chan
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Publication number: 20200098169Abstract: Described herein are techniques for improving the effectiveness of depth culling. In a first technique, a binner is used to sort primitives into depth bins. Each depth bin covers a range of depths. The binner transmits the depth bins to the screen space pipeline for processing in near-to-far order. Processing the near bins first results in the depth buffer being updated, allowing fragments for the primitives in the farther bins to be culled more aggressively than if the depth binning did not occur. In a second technique, a buffer is used to initiate two-pass processing through the screen space pipeline. In the first pass, primitives are sent down to update the depth block and are then culled. The fragments are processed normally in the second pass, with the benefit of the updated depth values.Type: ApplicationFiled: September 21, 2018Publication date: March 26, 2020Applicant: Advanced Micro Devices, Inc.Inventors: Ruijin Wu, Young In Yeo, Sagar S. Bhandare, Vineet Goel, Martin G. Sarov, Christopher J. Brennan
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Patent number: 10529118Abstract: A technique for compressing an original image is disclosed. According to the technique, an original image is obtained and a delta-encoded image is generated based on the original image. Next, a segregated image is generated based on the delta-encoded image and then the segregated image is compressed to produce a compressed image. The segregated image is generated because the segregated image may be compressed more efficiently than the original image and the delta image.Type: GrantFiled: June 29, 2018Date of Patent: January 7, 2020Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ruijin Wu, Skyler Jonathon Saleh, Christopher J. Brennan, Kei Ming Kwong, Anthony Hung-Cheong Chan
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Publication number: 20200005514Abstract: A technique for compressing an original image is disclosed. According to the technique, an original image is obtained and a delta-encoded image is generated based on the original image. Next, a segregated image is generated based on the delta-encoded image and then the segregated image is compressed to produce a compressed image. The segregated image is generated because the segregated image may be compressed more efficiently than the original image and the delta image.Type: ApplicationFiled: June 29, 2018Publication date: January 2, 2020Applicants: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ruijin Wu, Skyler Jonathon Saleh, Christopher J. Brennan, Kei Ming Kwong, Anthony Hung-Cheong Chan
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Patent number: 10510185Abstract: A technique for performing rasterization and pixel shading with decoupled resolution is provided herein. The technique involves performing rasterization as normal to generate fine rasterization data and a set of (fine) quads. The quads are accumulated into a tile buffer and coarse quads are generated from the quads in the tile buffer based on a shading rate. The shading rate determines how many pixels of the fine quads are combined to generate coarse pixels of the coarse quads. Combination of fine pixels involves generating a single coarse pixel for each such fine pixel to be combined. The positions of the coarse pixels of the coarse quads are set based on the positions of the corresponding fine pixels. The coarse quads are shaded normally and the resulting shaded coarse quads are modified based on the fine rasterization data to generate shaded fine quads.Type: GrantFiled: August 25, 2017Date of Patent: December 17, 2019Assignee: ADVANCED MICRO DEVICES, INC.Inventors: Skyler Jonathon Saleh, Christopher J. Brennan, Andrew S. Pomianowski, Ruijin Wu
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Publication number: 20190066352Abstract: A pipeline is configured to access a memory that stores a texture block and metadata that encodes compression parameters of the texture block and a residency status of the texture block. A processor requests access to the metadata in conjunction with requesting data in the texture block to perform a shading operation. The pipeline selectively returns the data in the texture block to the processor depending on whether the metadata indicates that the texture block is resident in the memory. A cache can also be included to store a copy of the metadata that encodes the compression parameters of the texture block. The residency status and the metadata stored in the cache can be modified in response to requests to access the metadata stored in the cache.Type: ApplicationFiled: August 25, 2017Publication date: February 28, 2019Inventors: Maxim V. KAZAKOV, Skyler J. SALEH, Ruijin WU, Sagar Shankar BHANDARE
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Publication number: 20190066371Abstract: A technique for performing rasterization and pixel shading with decoupled resolution is provided herein. The technique involves performing rasterization as normal to generate fine rasterization data and a set of (fine) quads. The quads are accumulated into a tile buffer and coarse quads are generated from the quads in the tile buffer based on a shading rate. The shading rate determines how many pixels of the fine quads are combined to generate coarse pixels of the coarse quads. Combination of fine pixels involves generating a single coarse pixel for each such fine pixel to be combined. The positions of the coarse pixels of the coarse quads are set based on the positions of the corresponding fine pixels. The coarse quads are shaded normally and the resulting shaded coarse quads are modified based on the fine rasterization data to generate shaded fine quads.Type: ApplicationFiled: August 25, 2017Publication date: February 28, 2019Applicant: Advanced Micro Devices, Inc.Inventors: Skyler Jonathon Saleh, Christopher J. Brennan, Andrew S. Pomianowski, Ruijin Wu
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Patent number: 10169843Abstract: A processing system selectively renders pixels or blocks of pixels of an image and leaves some pixels or blocks of pixels unrendered to conserve resources. The processing system generates a motion vector field to identify regions of an image having moving areas. The processing system uses a rendering processor to identify as regions of interest those units having little to no motion, based on the motion vector field, and a large amount of edge activity, and to minimize the probability of unrendered pixels, or “holes”, in these regions. To avoid noticeable patterns, the rendering processor applies a probability map to determine the possible locations of holes, assigning to each unit a probability indicating the percentage of pixels within the unit that will be holes, and assigning a lower probability to units identified as regions of interest.Type: GrantFiled: November 20, 2017Date of Patent: January 1, 2019Assignees: Advanced Micro Devices, Inc., ATI Technologies ULCInventors: Ihab Amer, Guennadi Riguer, Ruijin Wu, Skyler J. Saleh, Boris Ivanovic, Gabor Sines
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Patent number: 10096147Abstract: In an example, a method for rendering a 3-D scene of graphical data into a 2-D scene may include dividing 2-D space used to represent the 3-D scene from a viewpoint into a plurality of tiles. The 3-D scene may include a plurality of primitives. The method may include generating visibility information for a first tile of the plurality of tiles. The method may include modifying the visibility information for the first tile to generate modified visibility information for the first tile. The method may include generating the 2-D scene using the modified visibility information for the first tile.Type: GrantFiled: March 10, 2016Date of Patent: October 9, 2018Assignee: QUALCOMM IncorporatedInventors: Vineet Goel, Ruijin Wu, Young In Yeo
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Publication number: 20170263039Abstract: In an example, a method for rendering a 3-D scene of graphical data into a 2-D scene may include dividing 2-D space used to represent the 3-D scene from a viewpoint into a plurality of tiles. The 3-D scene may include a plurality of primitives. The method may include generating visibility information for a first tile of the plurality of tiles. The method may include modifying the visibility information for the first tile to generate modified visibility information for the first tile. The method may include generating the 2-D scene using the modified visibility information for the first tile.Type: ApplicationFiled: March 10, 2016Publication date: September 14, 2017Inventors: Vineet Goel, Ruijin Wu, Young In Yeo