Abstract: An edge-emitting etched-facet optical semiconductor structure includes a substrate, an active multiple quantum well (MQW) region formed on the substrate, a ridge waveguide formed over the MQW region extending in substantially a longitudinal direction between a waveguide first etched end facet disposed in a first window and a waveguide second etched end facet disposed in a second window, and first and second trenches having non-uniform widths extending in substantially the longitudinal direction between the first and second windows.

Abstract: An N-channel parallel optical transmitter includes a dual-facet continuous-wave laser, two or more optical splitters, and four or more optical modulators. One of the optical splitters has an input coupled to the first facet of the laser, and another has an input coupled to the second facet of the laser. The outputs of the splitters are coupled to the inputs of the optical modulators.

Abstract: An edge-emitting optical semiconductor structure has a substrate, an active multiple quantum well (MQW) region formed on the substrate, and a ridge waveguide extending between first and second etched end facets. The first etched end facet is disposed in a first window, while the second etched end facet is disposed in a second window. The first etched end facet extends between a pair of alcoves in the first window, and the second etched end facet extends between a pair of alcoves in the second window. An integrated device in which two such structures are provided has an H-shaped window where the two structures adjoin each other. The structure can be fabricated using a process that involves a first mask to form the ridge waveguide and then a second mask and an etching process to form the windows.

Abstract: An edge-emitting etched-facet optical semiconductor structure has a substrate, an active multiple quantum well (MQW) region formed on the substrate, and a ridge waveguide formed over the MQW region extending in substantially a longitudinal direction between a waveguide first etched end facet and a waveguide second etched end facet. A mask layer used to form windows in which the etched end facets are disposed consists of a single dielectric material disposed directly on the ridge waveguide. An optical coating consisting of no more than one layer of the same dielectric material of which the second mask is made is disposed directly on the second mask and disposed directly on the windows to coat the etched end facets.

Abstract: A photonic semiconductor device and method are provided that ensure that the surface of the device upon completion of the SAG process is planar, or at least substantially planar, such that performance of the subsequent processes is facilitated, thereby enabling higher manufacturing yield to be achieved. A photonic semiconductor device and method are also provided that ensure that the isolation region of the device will have high resistance and low capacitance, without requiring the placement of a thick dielectric material beneath each of the contact pads. Eliminating the need to place thick dielectric materials underneath the contact pads eliminates the risk that the contact pads will peel away from the assembly.

Abstract: A photonic semiconductor device and method are provided that ensure that the surface of the device upon completion of the SAG process is planar, or at least substantially planar, such that performance of the subsequent processes is facilitated, thereby enabling higher manufacturing yield to be achieved. A photonic semiconductor device and method are also provided that ensure that the isolation region of the device will have high resistance and low capacitance, without requiring the placement of a thick dielectric material beneath each of the contact pads. Eliminating the need to place thick dielectric materials underneath the contact pads eliminates the risk that the contact pads will peel away from the assembly.

Abstract: A photonic semiconductor device and method are provided that ensure that the surface of the device upon completion of the SAG process is planar, or at least substantially planar, such that performance of the subsequent processes is facilitated, thereby enabling higher manufacturing yield to be achieved. A photonic semiconductor device and method are also provided that ensure that the isolation region of the device will have high resistance and low capacitance, without requiring the placement of a thick dielectric material beneath each of the contact pads. Eliminating the need to place thick dielectric materials underneath the contact pads eliminates the risk that the contact pads will peel away from the assembly.

Abstract: A photonic semiconductor device and method are provided that ensure that the surface of the device upon completion of the SAG process is planar, or at least substantially planar, such that performance of the subsequent processes is facilitated, thereby enabling higher manufacturing yield to be achieved. A photonic semiconductor device and method are also provided that ensure that the isolation region of the device will have high resistance and low capacitance, without requiring the placement of a thick dielectric material beneath each of the contact pads. Eliminating the need to place thick dielectric materials underneath the contact pads eliminates the risk that the contact pads will peel away from the assembly.

Abstract: Integrated semiconductor devices are manufactured by providing a layered semiconductor structure having an exposed surface and providing a mask on the exposed surface thereby defining a masked region in the layered structure underneath said mask. The mask has a main direction of extension with a width across the main direction and an end portion. The layered structure is etched over a given depth starting from the exposed surface, whereby the masked region is left substantially unaffected by the etching process and has an end surface extending underneath the end portion of the mask. A further layered semiconductor structure is grown around the masked region to produce an integrated layered semiconductor structure having at the end surface an interface between the layered structure and the further grown structure. The mask width is selected to be less than 50 microns.

Abstract: A semiconductor laser structure includes a substrate and an active region having at least one active laser layer. The active region is included in a ridge protruding from an exposed surface of the substrate. The ridge extends in the direction of the laser cavity and includes at least two opposed and electrically connected lateral extensions defining respective metal bonding pads distributed along the length of the laser cavity.

Abstract: A semiconductor laser having a mesa structure includes active laser layers. The mesa structure is confined by Fe—InP lateral semi-insulating layers. A p blocking layer is interposed between the mesa structure and the lateral semi-insulating layers. Performance at high temperature and linear laser operation are improved. A preferred application is for manufacturing SIBH-DFB lasers for direct modulation in the 10 Gbit/s range.

Abstract: Integrated semiconductor devices are manufactured by providing a layered semiconductor structure having an exposed surface and providing a mask on the exposed surface thereby defining a masked region in the layered structure underneath said mask. The mask has a main direction of extension with a width across the main direction and an end portion. The layered structure is etched over a given depth starting from the exposed surface, whereby the masked region is left substantially unaffected by the etching process and has an end surface extending underneath the end portion of the mask. A further layered semiconductor structure is grown around the masked region to produce an integrated layered semiconductor structure having at the end surface an interface between the layered structure and the further grown structure. The mask width is selected to be less than 50 microns.

Abstract: A semiconductor laser structure includes a substrate and an active region having at least one active laser layer. The active region is included in a ridge protruding from an exposed surface of the substrate. The ridge extends in the direction of the laser cavity and includes at least two opposed and electrically connected lateral extensions defining respective metal bonding pads distributed along the length of the laser cavity.

Abstract: A semiconductor laser having a mesa structure includes active laser layers. The mesa structure is confined by Fe—InP lateral semi-insulating layers. A p blocking layer is interposed between the mesa structure and the lateral semi-insulating layers. Performance at high temperature and linear laser operation are improved. A preferred application is for manufacturing SIBH-DFB lasers for direct modulation in the 10 Gbit/s range.