Abstract: A switch-mode power supply (SMPS), an SMPS system and a power supply method for an SMPS system are disclosed. The SMPS controller includes an output-voltage power supply unit, a built-in energy storage unit and a logic control unit. The output-voltage power supply unit is configured to charge the built-in energy storage unit using an output voltage from the SMPS system so that the built-in energy storage unit can provide an operating voltage for the logic control unit. The use of a stand-off energy storage capacitor can be dispensed with, and the use of the output voltage as a power supply is enabled. As a result, significant reductions in overall and standby power dissipation are achieved. In addition, the SMPS controller may further include a high-voltage power supply unit, which provides a hybrid power supply solution, together with the output-voltage power supply unit.

Abstract: A control circuit, a control chip and a power supply device are disclosed by the present invention. The control circuits are used for control of a constant-voltage closed-loop which causes a voltage of a voltage feedback signal obtained from an output voltage to approach a voltage of a reference voltage signal obtained from a base voltage and thereby achieves a constant-voltage output. In addition, when a sampled current obtained from an output current is higher than a predetermined current, or when output power is higher than a predetermined power, the control circuit increases the voltage feedback signal or decreases the reference voltage signal, causing the constant-voltage closed loop to decrease the output voltage and the output current and thereby achieving a limited output current and limited output power.

Abstract: An operation circuit and a chip pertaining to the field of integrated circuit design technology are disclosed by the present application. The circuit includes a capacitor charging/discharging module and an error amplification module electrically connected to the capacitor charging/discharging module. The capacitor charging/discharging module is configured to receive a first signal and a third signal that are external to the capacitor charging/discharging module and to output a feedback signal. The error amplification module is configured to receive the feedback signal and a second signal that is external to error amplification module and to output, based on the received feedback and second signals, a target signal to the capacitor charging/discharging module. In a steady state, values of the target, first, second and third signals satisfy a predefined mathematical relationship.

Abstract: An operation circuit and a chip pertaining to the field of integrated circuit design technology are disclosed by the present invention. The circuit includes a capacitor charging/discharging module and an error amplification module electrically connected to the capacitor charging/discharging module. The capacitor charging/discharging module is configured to receive first, second and third signals external to the capacitor charging/discharging module, and to output a reference signal and a feedback signal. The error amplification module is configured to receive the reference and feedback signals and output a target signal to the capacitor charging/discharging module based on the received reference and feedback signals. The first, second and third signals are all analog signals, and in a steady state, values of the target, first, second and third signals satisfy a predefined mathematical relationship.

Abstract: An output short-circuit protection method, a power management chip and a switched-mode power supply are disclosed. When current accumulation has occurred in a power transistor, the number of consecutive current pulses during which the current accumulation occurred is counted. Upon the number of consecutive current pulses reaches a preset value, a regulation interval spanning switching periods is triggered, for at least some of the switching periods, the leading-edge blanking time is shortened or cancelled. In this way, an excessively large current flowing through the power transistor is prevented. Compared with existing fault response measures for power management chips, restart of the power supply and adjustment of the system timing are not needed, allowing easier implementation. Further, the automatic restart during chip start up due to false triggering as found in the existing measures for power management chips is circumvented.

Abstract: A switch-mode power supply (SMPS), an SMPS system and a power supply method for an SMPS system are disclosed. The SMPS controller includes an output-voltage power supply unit, a built-in energy storage unit and a logic control unit. The output-voltage power supply unit is configured to charge the built-in energy storage unit using an output voltage from the SMPS system so that the built-in energy storage unit can provide an operating voltage for the logic control unit. The use of a stand-off energy storage capacitor can be dispensed with, and the use of the output voltage as a power supply is enabled. As a result, significant reductions in overall and standby power dissipation are achieved. In addition, the SMPS controller may further include a high-voltage power supply unit, which provides a hybrid power supply solution, together with the output-voltage power supply unit.

Abstract: A switching regulator having fast start-up time and low standby power is disclosed. In an exemplary embodiment, an apparatus includes a transistor that generates a charging current at a first current level from a base current received at a base terminal. The apparatus also includes a capacitor that charges in response to the charging current at the first current level to generate a voltage signal that increases at a first rate. The apparatus also includes a charge pump having an output coupled to the base terminal. The charge pump outputs a charge pump current when the voltage signal exceeds a first voltage level. The base current is increased by charge pump current to cause the transistor to generate the charging current at a second current level, and the capacitor charges in response to the charging current at the second current level to generate the voltage signal that increases at a second rate.

Abstract: A switching regulator having fast start-up time and low standby power is disclosed. In an exemplary embodiment, an apparatus includes a transistor that generates a charging current at a first current level from a base current received at a base terminal. The apparatus also includes a capacitor that charges in response to the charging current at the first current level to generate a voltage signal that increases at a first rate. The apparatus also includes a charge pump having an output coupled to the base terminal. The charge pump outputs a charge pump current when the voltage signal exceeds a first voltage level. The base current is increased by charge pump current to cause the transistor to generate the charging current at a second current level, and the capacitor charges in response to the charging current at the second current level to generate the voltage signal that increases at a second rate.