Abstract: This invention relates to assemblies and processes for increasing the bandwidth of differential passive elements. The use of a floating plane in differential transmission lines is disclosed. One such assembly is a broadband balun having high even mode effective impedance, thus degrading the even-mode propagation or matching, and maintaining the desired odd mode effective impedance. Other assemblies can include line couplers, hybrid couplers, RF chokes with back-to-back baluns, and other elements, such as balanced filters.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: An electrical circuit includes: at least one inductor, at least one varactor, and at least two transistors, all of which electrically arranged to form a voltage controlled oscillator (VCO) having an oscillation frequency; wherein the at least two transistors includes a first transistor and a second transistor; wherein the first transistor has a first bulk terminal and a first parasitic diode disposed between the first bulk terminal and the first transistor; wherein the second transistor has a second bulk terminal and a second parasitic diode disposed between the second bulk terminal and the second transistor; wherein application of a first control voltage to the first bulk terminal, application of a second control voltage to the second bulk terminal, or application of first and second control voltages to the first and second bulk terminals, respectively, is effective to change the oscillation frequency of the VCO.

Abstract: A system includes: a phase frequency detector (PFD) having an output switchably connectable and disconnectable to a first signal path via a first switch, and switchably connectable and disconnectable to a second signal path via a second switch; a first filter disposed in the first signal path; a second filter disposed in the second signal path; and, a voltage controlled oscillator (VCO) operatively coupled to the first signal path downstream of the first filter, and operatively coupled to the second signal path downstream of the second filter. The VCO includes: a capacitive device or a current controlling device operatively coupled to the first signal path; and, a bulk terminal operatively coupled to the second signal path.

Abstract: An electronic sub-integer frequency divider circuit, including: a phase rotator circuit, a clock circuitry, a pulse generator which is configured to: (a) receive a plurality of signals having a period TP and of different phases; (b) based on a control command, to process a second clock signal and one or more of the plurality of signals, to produce a second signal which includes S pulses in each period TP; and (c) process the second signal and a first clock signal to produce a regulating signal by which the phase rotator circuit is controlled; and an output interface configured to provide a sub-integer output signal whose frequency is responsive to the regulating signal.