Abstract: A delta-sigma beamformer includes a beamsummer and a plurality of delta-sigma modules. Each of the delta sigma modules includes a delta-sigma modulator configured to receive analog ultrasound signals from one or more transducer elements and output a delay line including a plurality of samples based on the analog ultrasound signals. Each delta-sigma modulator includes a comb filter connected to the delta-sigma modulator and configured to output a difference between two of the plurality of samples in the delay line. Each delta-sigma modulator includes an accumulator module. Each accumulator module includes an accumulator connected to the comb filter. Each accumulator module is configured to integrate signals received from the comb filter during a non-delay-expansion period and transmit the integrated signals to the beamsummer during the non-delay-expansion period. Each accumulator module is configured to output a zero to the beamsummer during a delay-expansion period.

Abstract: A delta-sigma beamformer includes a beamsummer and a plurality of delta-sigma modules. Each of the delta sigma modules includes a delta-sigma modulator configured to receive analog ultrasound signals from one or more transducer elements and output a delay line including a plurality of samples based on the analog ultrasound signals. Each delta-sigma modulator includes a comb filter connected to the delta-sigma modulator and configured to output a difference between two of the plurality of samples in the delay line. Each delta-sigma modulator includes an accumulator module. Each accumulator module includes an accumulator connected to the comb filter. Each accumulator module is configured to integrate signals received from the comb filter during a non-delay-expansion period and transmit the integrated signals to the beamsummer during the non-delay-expansion period. Each accumulator module is configured to output a zero to the beamsummer during a delay-expansion period.

Abstract: A continuous-time delta sigma converter includes a loop filter having a plurality of serially coupled integrators including a first integrator responsive to an input of the Delta Sigma converter and a last integrator responsive to a first feedback loop and providing an integrated output signal, and a voltage controlled oscillator (VCO) based quantizer responsive to the loop filter for integrating the integrated output signal and providing a digital output signal. The first feedback loop includes a first time delay circuit responsive to the output of the quantizer and at least one switched capacitor digital to analog converter (DAC) responsive to the first time delay circuit. The first feedback loop is configured to differentiate the digital output signal twice and provide the last integrator of the loop filter with a double differentiated analog signal to reduce excess loop delay.

Abstract: A continuous time ?? analog-to-digital converter with mitigation bit shifting multiplex array including a loop filter, a VCO responsive to analog signal configured to adjust the output frequency based on the magnitude of the analog signal and produce a digital output, a multi-stage phase quantizer responsive to the digital output configured to determine the phase of the VCO by comparing the phase of the VCO for a particular sample to a reference phase at said particular sample and generate a quantized phase difference value, and a multiplexer array coupled to the multi-stage phase quantizer configured to shift selected misaligned bits of the quantized phase difference value by a predetermined amount of bits to mitigate bit shifting of the multi-stage phase quantizer.

Abstract: A continuous-time delta sigma converter includes a loop filter having a plurality of serially coupled integrators including a first integrator responsive to an input of the Delta Sigma converter and a last integrator responsive to a first feedback loop and providing an integrated output signal, and a voltage controlled oscillator (VCO) based quantizer responsive to the loop filter for integrating the integrated output signal and providing a digital output signal. The first feedback loop includes a first time delay circuit responsive to the output of the quantizer and at least one switched capacitor digital to analog converter (DAC) responsive to the first time delay circuit. The first feedback loop is configured to differentiate the digital output signal twice and provide the last integrator of the loop filter with a double differentiated analog signal to reduce excess loop delay.

Abstract: A continuous time ?? analog-to-digital converter with mitigation bit shifting multiplex array including a loop filter, a VCO responsive to analog signal configured to adjust the output frequency based on the magnitude of the analog signal and produce a digital output, a multi-stage phase quantizer responsive to the digital output configured to determine the phase of the VCO by comparing the phase of the VCO for a particular sample to a reference phase at said particular sample and generate a quantized phase difference value, and a multiplexer array coupled to the multi-stage phase quantizer configured to shift selected misaligned bits of the quantized phase difference value by a predetermined amount of bits to mitigate bit shifting of the multi-stage phase quantizer.