Abstract: Provided are a signal readout circuit and a method therefor. In the signal readout circuit, a readout row selector is configured to gate a row of pixel units in a pixel array. A reset row selector is configured to gate first reset switches of the row of pixel units. Each pixel unit in the row in a pixel subarray included in the pixel array converts an optical signal into an electrical signal, and outputs the electrical signal to a connected pixel subarray readout feedback circuit. When it is determined based on the electrical signal that a signal generation condition is met, a reset signal is generated and sent to a first pixel unit, and an output signal is generated for output.

Abstract: A method, computer system, and a computer-readable medium for registering one or more structures to a desired orientation for planning and guidance for surgery is provided. The method includes in a preoperative stage, obtaining one or more 3D models of one or more structures from one or more CT images using an image processing segmentation technique or a manual segmentation technique; in the preoperative stage, registering the one or more structures to a template that is adapted to an alternating registration for a patient-specific shape and pose for a desired reduction and corresponding reduction transformations; in an intraoperative stage, mapping the one or more structures to one or more radiographs via a 3D-2D registration that iteratively optimizes a similarity metric between acquired and simulated radiographs; and in the intraoperative stage, providing an output that is representative of a radiograph or a 3D tomographic representation to provide guidance to a user.

Abstract: A spiking convolutional neural network based on a FLASH storage and computing array, including: a sampling module, a FLASH-based storage and computing array and a corresponding neuron module, and a counter module; the sampling module is used to sample an input image to obtain an input spike; the FLASH-based storage and computing array stores a weight matrix, and is used to perform a vector matrix multiplying operation on the input spike and the weight matrix, and an operation result is output in a form of current; the neuron module is used to integrate the operation result of the FLASH-based storage and computing array so as to generate an output spike; the counter module is used to count a number of spikes generated by the neuron module of an output layer, and determine the number of spikes of the neuron module with a largest number of spikes as a recognition result.

Abstract: A system and a method for compressing an image based on a FLASH in-memory computing array are provided. The system includes: a convolutional neural network for encoding of the FLASH in-memory computing array, a convolutional neural network for decoding based on the FLASH in-memory computing array, and a quantization module; the convolutional neural network for encoding based on the FLASH in-memory computing array is configured to encode an original image to obtain a feature image; the quantization module is configured to quantize the feature image to obtain a quantized image; the convolutional neural network for decoding based on the FLASH in-memory computing array is configured to decode the quantized image to obtain a compressed image.

Abstract: The present disclosure relates to the field of semiconductor integrated circuits and manufacturing technologies thereof, and discloses a method and device for realizing a convolution operation based on an NOR flash storage structure. The NOR flash array has a structure of an array composed of a plurality of NOR flash cells. The convolution operation method includes: storing elements of a convolution kernel matrix into the NOR flash cells; converting elements of an input matrix into voltages and applying the voltages to gate terminals of the NOR flash cells; applying a driving voltage to source terminals of the NOR flash cells; and collecting, via drain terminals of the NOR flash cells, current values of each column to obtain a convolution operation result.

Abstract: The present disclosure relates to the field of semiconductor integrated circuits and manufacturing technologies thereof, and discloses a method and device for realizing a convolution operation based on an NOR flash storage structure. The NOR flash array has a structure of an array composed of a plurality of NOR flash cells. The convolution operation method includes: storing elements of a convolution kernel matrix into the NOR flash cells; converting elements of an input matrix into voltages and applying the voltages to gate terminals of the NOR flash cells; applying a driving voltage to source terminals of the NOR flash cells; and collecting, via drain terminals of the NOR flash cells, current values of each column to obtain a convolution operation result.

Abstract: A method, computer system, and a computer-readable medium for registering one or more structures to a desired orientation for planning and guidance for surgery is provided. The method includes in a preoperative stage, obtaining one or more 3D models of one or more structures from one or more CT images using an image processing segmentation technique or a manual segmentation technique; in the preoperative stage, registering the one or more structures to a template that is adapted to an alternating registration for a patient-specific shape and pose for a desired reduction and corresponding reduction transformations; in an intraoperative stage, mapping the one or more structures to one or more radiographs via a 3D-2D registration that iteratively optimizes a similarity metric between acquired and simulated radiographs; and in the intraoperative stage, providing an output that is representative of a radiograph or a 3D tomographic representation to provide guidance to a user.