Patents by Inventor Ruoh-Huey Uang
Ruoh-Huey Uang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7605474Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: GrantFiled: June 30, 2006Date of Patent: October 20, 2009Assignee: Industrial Technology Research InstituteInventors: Ruoh Huey Uang, Yu Chih Chen, Ren Jen Lin, Syh Yuh Cheng
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Patent number: 7598609Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: GrantFiled: November 30, 2004Date of Patent: October 6, 2009Assignee: Industrial Technology Research InstituteInventors: Ruoh Huey Uang, Yu Chih Chen, Ren Jay Lin, Syh Yuh Cheng
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Publication number: 20090197011Abstract: A method for manufacturing a substrate with surface substrates by employing photothermal effect is described. Nanoparticles on the surface of the substrate excited by a beam convert light energy to thermal energy. The surface structure on the substrate is formed through the thermal energy generated by the excited nanoparticles. The substrate with plural pores is thus formed.Type: ApplicationFiled: January 29, 2009Publication date: August 6, 2009Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Tzong-Ming LEE, Ruoh-Huey Uang, Kuo-Chan Chiou, Yu-Ming Wang, Yi-Ting Cheng
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Patent number: 7526861Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: GrantFiled: June 30, 2006Date of Patent: May 5, 2009Assignee: Industrial Technology Research InstituteInventors: Ruoh Huey Uang, Yu Chih Chen, Ren Jen Lin, Syh Yuh Cheng
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Patent number: 7163885Abstract: A method for dispersing and fixing particles on the bumps of a chip using an electrophoresis technology is provided. The particles and chip bumps are processed to carry charges by applying chemical bonding between metal and thiol with electric charges. The chip is placed in a reactor with a solution along with the conductive particles. The conductive particles are then migrated and fixed to the bonding locations on the bumps of a chip through an electrophoresis procedure. For conductive particles not carrying charges, they can sink naturally to the surface of chip bumps due to their higher density than water in the solution. An electroplating procedure is then applied to fix the conductive particles onto the bump.Type: GrantFiled: June 5, 2004Date of Patent: January 16, 2007Assignee: Industrial Technology Research InstituteInventors: Yu-Chih Chen, Ruoh-Huey Uang, Yu-Hua Chen
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Publication number: 20060249834Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: ApplicationFiled: June 30, 2006Publication date: November 9, 2006Applicant: Industrial Technology Research InstituteInventors: Ruoh-Huey Uang, Yu-Chih Chen, Ren-Jan Lin, Syh-Yuh Cheng
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Publication number: 20060243972Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: ApplicationFiled: June 30, 2006Publication date: November 2, 2006Applicant: Industrial Technology Research InstituteInventors: Ruoh-Huey Uang, Yu-Chih Chen, Ren-Jan Lin, Syh-Yuh Cheng
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Publication number: 20060081989Abstract: A composite conductive film formed of a polymer-matrix and a plurality of conductive lines less than micro-sized and its fabricating method are provided. The conductive lines are arranged parallel and spaced apart from each other so as to provide anisotropic conductivity. The present conductive film can serve as an electrical connection between a fine-pitch chip and a substrate. Additionally, an adhesive layer is formed on two opposite sides of the conductive film along its conductive direction to increase adhesive areas. The strength and reliability of the package using the conductive film are thus enhanced.Type: ApplicationFiled: November 30, 2004Publication date: April 20, 2006Applicant: Industrial Technology Research InstituteInventors: Ruoh-Huey Uang, Yu-Chih Chen, Ren-Jay Lin, Syh-Yuh Cheng
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Patent number: 6989325Abstract: A self-assembled nanometer conductive bump and a method for fabricating the bump. In the method, a multiplicity of carbon nanotubes that are coated at two ends with chemically functional groups is first provided. A substrate that is equipped with at least one bond pad on a surface is then positioned juxtaposed to the carbon nanotubes for forming a bond between the carbon nanotubes and the metal pads facilitated by a chemical affinity existed between the functional groups and the metal pad.Type: GrantFiled: September 3, 2003Date of Patent: January 24, 2006Assignee: Industrial Technology Research InstituteInventors: Ruoh-Huey Uang, Yu-Hua Chen
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Publication number: 20050227475Abstract: A method for dispersing conductive particles is provided, which takes advantages of simplified process and lower cost. The present invention is in applying of chemical bonding between metal and thiol with electric charge, thereby makes conductive particles and chip bumps carry charges. The conductive particles are then migrated and fixed to the bonding locations on the bumps of a chip through an electrophoresis procedure. The conductive particles will not come off during subsequent processes. The present invention can be applied to flip-chip packaging or other fine-pitch applications. With the present invention, the distance between bumps is smaller than 20 ?m and the density of conductive particles is larger than 15 particles per bump.Type: ApplicationFiled: June 5, 2004Publication date: October 13, 2005Inventors: Yu-Chih Chen, Ruoh-Huey Uang, Yu-Hua Chen
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Publication number: 20050048697Abstract: A self-assembled nanometer conductive bump and a method for fabricating the bump. In the method, a multiplicity of carbon nanotubes that are coated at two ends with chemically functional groups is first provided. A substrate that is equipped with at least one bond pad on a surface is then positioned juxtaposed to the carbon nanotubes for forming a bond between the carbon nanotubes and the metal pads facilitated by a chemical affinity existed between the functional groups and the metal pad.Type: ApplicationFiled: September 3, 2003Publication date: March 3, 2005Inventors: Ruoh-Huey Uang, Yu-Hua Chen
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Patent number: 6539624Abstract: A method for forming a wafer level package that is equipped with solder balls on a top surface and encapsulated by a stress buffer layer of an elastomeric material is disclosed. The method can be carried by first forming a plurality of solder balls on bond pads provided on a top surface of a wafer and then forming an elastomeric material layer, or any other flexible, compliant material layer to encapsulate the solder balls. The tip portions of the solder balls is then substantially exposed by an etching process of either dry etching or wet etching such that the solder balls can be connected electrically to a circuit board. The present invention further provides a wafer level package that is formed with solder balls on a top surface encapsulated in an elastomeric material layer. The elastomeric material layer serves both as a stress buffer and a thermal expansion buffer such that the integrity and reliability of IC devices severed from the wafer can be maintained.Type: GrantFiled: March 27, 1999Date of Patent: April 1, 2003Assignee: Industrial Technology Research InstituteInventors: Ling-Chen Kung, Kuo-Chuan Chen, Ruoh-Huey Uang, Szu-Wei Lu
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Patent number: 6440836Abstract: The present invention discloses a dual-photoresist method for forming fine-pitched solder bumps on flip chips by utilizing two separate layers of photoresist, i.e., a first thin photoresist layer for patterning the BLM layers on top of the aluminum bonding pads and a second thick photoresist layer for patterning the via openings on top of the BLM layers to supply the necessary thickness required for the solder bumps. The first, thin photoresist layer permits an accurate imaging process to be conducted without focusing problems which are normally associated with thick photoresist layers. As an optional step, the present invention may further utilize a thin layer of non-leachable metal such as Cu or Ni for coating on top of the BLM layer and thus further improving the electrical characteristics of the solder bumps subsequently formed thereon.Type: GrantFiled: March 16, 1999Date of Patent: August 27, 2002Assignee: Industrial Technology Research InstituteInventors: Szu-Wei Lu, Ling-Chen Kung, Ruoh-Huey Uang, Hsu-Tien Hu
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Patent number: 6268114Abstract: A method for forming solder balls that have larger spacings between them and electronic devices containing such solder balls are disclosed. In the method, an additional layer of a leachable metal such as gold or silver is used between an under bump metallurgy layer and a solder bump subsequently formed. This allows the formation of the under bump metallurgy layer prior to the deposition of the solder material into a window formed in a photoresist layer. The present invention allows the underfill of a solder window, instead of an overfill which is normally required in a conventional method.Type: GrantFiled: September 18, 1998Date of Patent: July 31, 2001Assignee: Taiwan Semiconductor Manufacturing Company, LtdInventors: Ying-Nan Wen, Ling-Chen Kung, Szu-Wei Lu, Ruoh-Huey Uang
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Patent number: 6179200Abstract: A method for forming solder balls that have improved height on an electronic substrate such as a silicon wafer and devices formed are disclosed. In the method, after solder bumps are deposited by a conventional method such as evaporation, electroplating, electroless plating or solder paste screen printing, the solder bumps are reflown on the substrate in an upside down position such that the gravity of the solder material pulls down the solder ball and thereby increasing its height after the reflow process is completed. It has been found that a minimum of 5%, and preferably about 10% height increase has been achieved. Another benefit achieved by the present invention novel method which is associated with the increase in the solder ball height is a corresponding increase in the pitch distance between the solder balls by at least 5%.Type: GrantFiled: February 3, 1999Date of Patent: January 30, 2001Assignee: Industrial Technology Research InstituteInventors: Ling-Chen Kung, Hsu-Tien Hu, Ruoh-Huey Uang, Szu-Wei Lu, Chun-Yi Kuo