Patents by Inventor Rupak Ghayal
Rupak Ghayal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11068006Abstract: Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.Type: GrantFiled: April 5, 2019Date of Patent: July 20, 2021Assignee: Intel CorporationInventors: Rupak Ghayal, Pradipta Patra, Ramnarayanan Muthukaruppan, Raghu Chepuri
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Publication number: 20190235557Abstract: Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.Type: ApplicationFiled: April 5, 2019Publication date: August 1, 2019Inventors: Rupak Ghayal, Pradipta Patra, Ramnarayanan Muthukaruppan, Raghu Chepuri
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Publication number: 20170322581Abstract: Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.Type: ApplicationFiled: May 15, 2017Publication date: November 9, 2017Inventors: Rupak Ghayal, Pradipta Patra, Ramnarayanan Muthukaruppan, Raghu Nandan Chepuri
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Patent number: 9658666Abstract: Some embodiments include apparatuses and method using a first node to receive an input voltage, a second node to provide an output voltage, circuit lanes coupled to the first and second nodes, each of the circuit lanes including switches coupled between the first and second nodes, and a controller to selectively place at least one circuit lane among the circuit lanes in an activated state to cause the at least one circuit lane to control the switches in order to adjust an amount of charge provided from a capacitor network to the output node based on a toggling frequency of a comparator output signal generated based on a comparison between a value of a reference voltage and a value of a feedback voltage generated from a value of the output voltage.Type: GrantFiled: December 18, 2015Date of Patent: May 23, 2017Assignee: Intel CorporationInventors: Rupak Ghayal, Venkata S. Nittala
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Patent number: 9651978Abstract: Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.Type: GrantFiled: April 17, 2015Date of Patent: May 16, 2017Assignee: Intel CorporationInventors: Rupak Ghayal, Pradipta Patra, Ramnarayanan Muthukaruppan, Raghu Nandan Chepuri
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Publication number: 20160306374Abstract: Described are apparatuses and methods for power management. The apparatus may include a power gate including a plurality of current sources. The power gate may be coupled to a load. The apparatus may further include a voltage control circuit, coupled to the power gate, to determine and select one or more current sources of the plurality of current sources to supply to the load. The apparatus may further include a current control circuit, coupled to the voltage control circuit, to control individual current sources of the one or more current sources to output a constant current. Other embodiments may be described and/or claimed.Type: ApplicationFiled: April 17, 2015Publication date: October 20, 2016Inventors: Rupak Ghayal, Pradipta Patra, Ramnarayanan Muthukaruppan, Raghu Nandan Chepuri
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Patent number: 9285816Abstract: In a solar panel array, each solar panel in a series-connected string has a current source connected across its output terminals. The current source generates a programmable output current equal to the difference of the load current drawn from the panel and the current corresponding to the maximum power point (MPP) of the panel. As a result, each of the panels in the string is operated at its MPP. When the array contains multiple strings connected in parallel, a voltage source is additionally connected in series with each string. The voltage sources are programmable to generate corresponding output voltages to enable operation of each panel in each of the multiple strings at its MPP. Respective control blocks providing the current sources and voltage sources automatically determine the MPP of the corresponding panels. In an embodiment, the control blocks are implemented as DC-DC converters in conjunction with measurement and communication units.Type: GrantFiled: March 25, 2011Date of Patent: March 15, 2016Inventors: Prakash Easwaran, Saumitra Singh, Rupak Ghayal, Amit Premy
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Publication number: 20140239725Abstract: A system for generating electric power includes a first DC source, a second DC source and a shared optimizer. The first DC source provides a first voltage across a first node and a second node, while the second DC source provides a second voltage across the second node and a third node. The shared optimizer is designed to provide a first programmable current source between the first node and the second node as well as a second programmable current source between the second node and the third node. In an embodiment, the first and second DC sources are solar panels, and the optimizer includes a DC-DC converter, which operates to maximize power output of the solar panels. The use of a single (shared) optimizer may obviate the need for separate optimizers for each solar panel, and thereby reduce system cost.Type: ApplicationFiled: February 22, 2013Publication date: August 28, 2014Applicant: INNOREL SYSTEMS PRIVATE LIMITEDInventors: Prakash Easwaran, Rupak Ghayal, Saumitra Singh
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Publication number: 20140198423Abstract: A circuit for controlling a Metal Oxide Semiconductor Field Effect Transistor (MOSFET) to generate a DC output voltage from a DC input voltage includes a first MOSFET and a second MOSFET. The circuit includes a gate resistor coupled to the first MOSFET. The circuit includes a first resistor and a zener diode coupled to the second MOSFET. In addition, the circuit includes a diode coupled to the zener diode and the first MOSFET. The circuit includes a first current path wherein the first current path includes the diode and the first MOSFET. The circuit includes a third MOSFET. Further, the circuit includes a Resistor-Capacitor (RC) filter coupled to source terminal of the third MOSFET. The circuit includes a third resistor having a first terminal and a second terminal, wherein the second terminal is coupled to drain terminal of the third MOSFET. The circuit also includes a fourth MOSFET.Type: ApplicationFiled: January 14, 2014Publication date: July 17, 2014Applicant: INNOREL SYSTEMS PRIVATE LIMITEDInventors: Sandeep Anand, Rupak Ghayal
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Patent number: 8648586Abstract: A circuit for sensing load current of a voltage regulator. The circuit includes a power transistor and a mirror transistor. A first transistor sizing circuit is coupled to the power transistor and is operable to control size of the power transistor based on a bias voltage of the power transistor, thereby regulating a first voltage for varying load conditions. The circuit also includes a feedback amplifier coupled to the power transistor and the mirror transistor. A transistor is coupled to the feedback amplifier and the mirror transistor. An analog to digital converter (ADC) is coupled to the transistor. A second transistor sizing circuit is coupled to the mirror transistor, the transistor, and the ADC. The second transistor sizing circuit is responsive to an output voltage to control size of the mirror transistor, thereby ensuring that accuracy of output voltage sensed by ADC is not limited by ADC's resolution.Type: GrantFiled: April 8, 2011Date of Patent: February 11, 2014Assignee: Cadence AMS Design India Private LimitedInventors: Saumitra Singh, Rupak Ghayal, Venkata Ravindra Kumar Narkedamilli
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Patent number: 8618693Abstract: In a solar panel array that includes a string of series-connected panels, the load current flowing through the string is measured. The peak current (Ipp) of a panel in the string is determined. A current equal to the difference of the load current and the peak current (Ipp) is generated in a current source connected across the output terminals of the panel. The panel is thereby operated at its maximum power point (MPP). To determine the peak current (Ipp) of the panel, the magnitude of current flowing through the panel is iteratively changed and the corresponding power generated by the panel is computed. The change in the current through the panel and the measurement of the corresponding power are repeated until a maximum power is determined as being generated by the panel. The maximum power corresponds to the maximum power point (MPP) and the peak current (Ipp) of the panel.Type: GrantFiled: March 25, 2011Date of Patent: December 31, 2013Assignee: Innorel Systems Private LimitedInventors: Prakash Easwaran, Saumitra Singh, Rupak Ghayal, Amit Premy
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Patent number: 8598860Abstract: A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.Type: GrantFiled: September 30, 2011Date of Patent: December 3, 2013Assignee: Cosmic Circuits Private LimitedInventors: Hrishikesh Bhagwat, Rupak Ghayal, Saumitra Singh, Pawan Gupta, Prakash Easwaran
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Publication number: 20120299580Abstract: A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.Type: ApplicationFiled: September 30, 2011Publication date: November 29, 2012Applicant: Cosmic Circuits Private LimitedInventors: Hrishikesh BHAGWAT, Rupak Ghayal, Saumitra Singh, Pawan Gupta, Prakash Easwaran
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Patent number: 8242762Abstract: A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.Type: GrantFiled: May 6, 2009Date of Patent: August 14, 2012Assignee: Cosmic Circuits Private LimitedInventors: Hrishikesh Bhagwat, Rupak Ghayal, Saumitra Singh, Pawan Gupta, Prakash Easwaran
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Patent number: 8237422Abstract: Efficient switch cascode architecture for switching devices, such as switching regulators. The cascode architecture includes a switching stage responsive to an external driver signal for switching transitions, and a bias generator operative to bias the cascode transistor of the switching stage to protect the switching stage from damage during the switching transitions.Type: GrantFiled: May 9, 2009Date of Patent: August 7, 2012Assignee: Cosmic Circuits Private LimitedInventors: Saumitra Singh, Rupak Ghayal, Chakravarthy Srinivasan, Prakash Easwaran
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Publication number: 20120193989Abstract: In a solar panel array that includes a string of series-connected panels, the load current flowing through the string is measured. The peak current (Ipp) of a panel in the string is determined. A current equal to the difference of the load current and the peak current (Ipp) is generated in a current source connected across the output terminals of the panel. The panel is thereby operated at its maximum power point (MPP). To determine the peak current (Ipp) of the panel, the magnitude of current flowing through the panel is iteratively changed and the corresponding power generated by the panel is computed. The change in the current through the panel and the measurement of the corresponding power are repeated until a maximum power is determined as being generated by the panel. The maximum power corresponds to the maximum power point (MPP) and the peak current (Ipp) of the panel.Type: ApplicationFiled: March 25, 2011Publication date: August 2, 2012Applicant: COSMIC CIRCUITS PVT LTDInventors: Prakash Easwaran, Saumitra Singh, Rupak Ghayal, Amit Premy
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Publication number: 20120193986Abstract: In a solar panel array, each solar panel in a series-connected string has a current source connected across its output terminals. The current source generates a programmable output current equal to the difference of the load current drawn from the panel and the current corresponding to the maximum power point (MPP) of the panel. As a result, each of the panels in the string is operated at its MPP. When the array contains multiple strings connected in parallel, a voltage source is additionally connected in series with each string. The voltage sources are programmable to generate corresponding output voltages to enable operation of each panel in each of the multiple strings at its MPP. Respective control blocks providing the current sources and voltage sources automatically determine the MPP of the corresponding panels. In an embodiment, the control blocks are implemented as DC-DC converters in conjunction with measurement and communication units.Type: ApplicationFiled: March 25, 2011Publication date: August 2, 2012Applicant: COSMIC CIRCUITS PVT LTDInventors: Prakash Easwaran, Saumitra Singh, Rupak Ghayal, Amit Premy
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Publication number: 20120176112Abstract: A circuit for sensing load current of a voltage regulator. The circuit includes a power transistor and a minor transistor. A first transistor sizing circuit is coupled to the power transistor and is operable to control size of the power transistor based on a bias voltage of the power transistor, thereby regulating a first voltage for varying load conditions. The circuit also includes a feedback amplifier coupled to the power transistor and the mirror transistor. A transistor is coupled to the feedback amplifier and the mirror transistor. An analog to digital converter (ADC) is coupled to the transistor. A second transistor sizing circuit is coupled to the mirror transistor, the transistor, and the ADC. The second transistor sizing circuit is responsive to an output voltage to control size of the minor transistor, thereby ensuring that accuracy of output voltage sensed by ADC is not limited by ADC's resolution.Type: ApplicationFiled: April 8, 2011Publication date: July 12, 2012Applicant: Cosmic Circuits Private LimitedInventors: Saumitra SINGH, Rupak Ghayal, Ravindra Kumar N
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Patent number: 8049472Abstract: Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.Type: GrantFiled: May 9, 2009Date of Patent: November 1, 2011Assignee: Cosmic Circuits Private LimitedInventors: Prakash Easwaran, Rupak Ghayal, Raghavendra Rao Haresamudram
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Publication number: 20100283439Abstract: Efficient switch cascode architecture for switching devices, such as switching regulators. The cascode architecture includes a switching stage responsive to an external driver signal for switching transitions, and a bias generator operative to bias the cascode transistor of the switching stage to protect the switching stage from damage during the switching transitions.Type: ApplicationFiled: May 9, 2009Publication date: November 11, 2010Applicant: COSMIC CIRCUITS PRIVATE LIMITEDInventors: Saumitra Singh, Rupak Ghayal, Chakravarthy Srinivasan, Prakash Easwaran