Abstract: A digitizer includes an analog-to-digital converter (ADC), a field programmable gate array (FPGA), a data link of a given interface standard between the ADC and the FPGA, and a display device operatively connected to the FPGA. The FPGA includes an IP controller configured according to the interface standard of the data link. An error detection and recovery method for the digitizer includes applying an analog input source signal to the ADC, acquiring data samples on the data link from the ADC to the FPGA, and the IP controller checking the data samples for errors. When the data samples include errors, the method further includes (a) the IP controller displaying on the display device a waveform of the captured data samples and an error message, (b) a user adjusting a voltage of the input signal source to within a given peak-to-peak voltage range, and (c) the IP controller resetting the data link without power cycling of the digitizer.

Abstract: User equipment dynamic scaling beam sweeping factor reporting is provided. A method for user equipment dynamic scaling beam sweeping factor reporting may include transmitting, to a network entity, capability information for supporting a dynamic beam sweeping factor by the apparatus. The dynamic beam sweeping factor may be adaptable over a range of values. The method may further include transmitting the dynamic beam sweeping factor to the network entity in assistance information of the apparatus over an uplink control channel.