Abstract: An integrated circuit (IC) die configured for packaging in a plurality of different IC packages, the IC die comprising: a first set of die contacts positioned in a first region of the integrated circuit die; a second set of die contacts positioned in a second region of the integrated circuit die; a package type contact; and routing circuitry configured to selectively route signals to or from either the first set of die contacts or the second set of die contacts based on a package type signal received at the package type contact.

Abstract: An amplifier circuit employing an output stage current mirror has improved power efficiency and stability. The amplifier circuit includes one or more amplifier stages connected in cascade. The one or more amplifier stages receive an analog input signal and generate a drive signal. The current mirror output stage includes an output device and a diode-connected mirror device. A gate of the output device is coupled to a gate of the mirror device, and the mirror device is coupled to an output of the one or more amplifier stages to receive the drive signal. The current mirror output stage provides an adjustable ratio by activation of one more additional devices that are selectively coupled to a mirror arm and an output arm of the current mirror output stage, decreasing the pre-driver power dissipation for high current levels, and decreasing the output capacitance at lower current levels, improving stability.

Abstract: An amplifier circuit and its method of operation reduce leakage in the output stage of the under no-load or low-load conditions. The amplifier circuit includes an amplifier stage that generates an output signal, an output stage including an output device, a pre-driver device coupled to a gate of the output device, and a feedback connection from the output device to the amplifier stage. A power supply rail of the amplifier is provided by a first power supply voltage, and the output signal of the amplifier stage is coupled to an input of the pre-driver device. A power supply rail of the output stage is provided by a second power supply voltage having a magnitude less than the first power supply voltage. An increased voltage magnitude at the output stage is compensated by driving a channel field potential of the output device above the second power supply voltage.

Abstract: Circuitry for driving first and second loads, the circuitry comprising: a first output signal path for supplying a first driving signal to the first load; a second output signal path for supplying a second driving signal to the second load; sequencer circuitry configured to initiate a first state change in the first output signal path and a second state change in the second output signal path, wherein the sequencer circuitry is configured to control the initiation of the first and second state changes such that the second state change is not synchronised with the first state change.

Abstract: Circuitry for detecting a capacitive load coupled between a first node and a second node, the circuitry comprising: drive circuitry for applying a first voltage to a first node over a first time period; processing circuitry configured to: measure a second voltage at the first node; and determine that the load is a capacitive load based on the second voltage.

Abstract: Circuitry for detecting a capacitive load coupled between a first node and a second node, the circuitry comprising: drive circuitry for applying a first voltage to a first node over a first time period; processing circuitry configured to: measure a second voltage at the first node; and determine that the load is a capacitive load based on the second voltage.

Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111 P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.

Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111 P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.

Abstract: This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111P) is configured to output a first intermediate voltage (VSAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance.

Abstract: This application relates to switch arrangements, in particular switch arrangements suitable for switchable connecting nodes of audio driving circuitry (100) that may, in use, experience a signal swing depending on an output audio driving signal (VD). A switch arrangement (300) comprises first and second transistors (301 and 302) of the same polarity type connected in series between the first and second nodes, with a third transistor (303) connected between a defined voltage (VS) and an intermediate node (N3) between the first and second transistors. The first transistor (301) has a drain connection to the first node (N1) and a source connection to the intermediate node (N3). The second transistor (302) has a drain connection to the second node (N2) and a source connection to the intermediate node (N3).

Abstract: This application relates to switch arrangements, in particular switch arrangements suitable for switchable connecting nodes of audio driving circuitry (100) that may, in use, experience a signal swing depending on an output audio driving signal (VD). A switch arrangement (300) comprises first and second transistors (301 and 302) of the same polarity type connected in series between the first and second nodes, with a third transistor (303) connected between a defined voltage (VS) and an intermediate node (N3) between the first and second transistors. The first transistor (301) has a drain connection to the first node (N1) and a source connection to the intermediate node (N3). The second transistor (302) has a drain connection to the second node (N2) and a source connection to the intermediate node (N3).

Abstract: This application describes methods and apparatus for selectively clamping a signal path (106) for an analog audio signal to a clamp voltage, e.g. ground. Voltage clamping circuitry (200) is disclosed having a first switching device (201) in series with a second switching device (202) between a node of the signal path and the clamp voltage. The clamping circuitry is configured to be operable in: a first state where the first and second switching devices are both on to electrically connect the signal path to the clamp voltage; and also a second state to electrically disconnect the signal path from the clamp voltage. In the second state one of the first and second switching devices is configured to block conduction when the voltage at said node of the signal path is positive and the other switching device is configured to block conduction when the voltage at said node of the signal path is negative.

Abstract: This application describes methods and apparatus for selectively clamping a signal path (106) for an analogue audio signal to a clamp voltage, e.g. ground. Voltage clamping circuitry (200) is disclosed having a first switching device (201) in series with a second switching device (202) between a node of the signal path and the clamp voltage. The clamping circuitry is configured to be operable in: a first state where the first and second switching devices are both on to electrically connect the signal path to the clamp voltage; and also a second state to electrically disconnect the signal path from the clamp voltage. In the second state one of the first and second switching devices is configured to block conduction when the voltage at said node of the signal path is positive and the other switching device is configured to block conduction when the voltage at said node of the signal path is negative.

Abstract: A regulator structure includes a first differential amplifier having a first input coupled to a reference voltage node. A second differential amplifier has a first input coupled to the output of the first differential amplifier. A third differential amplifier has a first input coupled to the output of the first differential amplifier. A first pmos transistor has its gate coupled to the second differential amplifier output, and its drain coupled to a second input of each of the first and second differential amplifiers. A second pmos transistor has its gate coupled to the third differential amplifier output, and its drain configured to output a regulated voltage which is also a second input of the third differential amplifier. A circuit is configured to replicate the regulated voltage and couple the replicated regulated voltage to the drain of the first pmos transistor.

Abstract: A regulator structure includes a first differential amplifier having a first input coupled to a reference voltage node. A second differential amplifier has a first input coupled to the output of the first differential amplifier. A third differential amplifier has a first input coupled to the output of the first differential amplifier. A first pmos transistor has its gate coupled to the second differential amplifier output, and its drain coupled to a second input of each of the first and second differential amplifiers. A second pmos transistor has its gate coupled to the third differential amplifier output, and its drain configured to output a regulated voltage which is also a second input of the third differential amplifier. A circuit is configured to replicate the regulated voltage and couple the replicated regulated voltage to the drain of the first pmos transistor.

Abstract: A linear regulator with an N-type pass transistor includes an over-current protection circuit. A current sink is used as an indicator for an over-current condition and is coupled to the output of the linear regulator. The indicator is coupled to a feedback logic circuit that controls the current through the output load. The over-current protection circuit extensively uses N-type devices for various components including the output driver stage in the circuit. This results in reduced area for the over-current protection circuit.

Abstract: A linear regulator with an N-type pass transistor includes an over-current protection circuit. A current sink is used as an indicator for an over-current condition and is coupled to the output of the linear regulator. The indicator is coupled to a feedback logic circuit that controls the current through the output load. The over-current protection circuit extensively uses N-type devices for various components including the output driver stage in the circuit. This results in reduced area for the over-current protection circuit.