Patents by Inventor Rushang Karia

Rushang Karia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Supervised learning with closed loop feedback to improve input output consistency of solid state drives
    Patent number: 11640243
    Abstract: A method and apparatus is disclosed for using supervised learning with closed loop feedback to improvement of output consistency for memory arrangements, such as a solid state drive.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 2, 2023
    Assignee: Western Digital Technologies, Inc.
    Inventors: Rushang Karia, Mervyn Wongso, Jacob Schmier, Kevin Corbin, Lakshmana Rao Chintada
  • Method and system for input-output throttling to improve quality of service in a solid state drive
    Patent number: 10956083
    Abstract: A non-volatile memory (NVM) system receives host requests that each specify a memory operation to be performed by the NVM system, the specified memory operations including read operations and write operations, and performs a set of operations for each memory operation specified by a received host request. The set of operations performed for each such memory operation include: initiating performance the memory operation; determining a throttle interval for the memory operation in accordance with at least a first factor, corresponding to available space in a write cache of the non-volatile memory system, and a second factor, corresponding to a metric corresponding to prevalence of write operations in the memory operations specified by the received host requests; and returning to the host system a response associated with the memory operation at a time no earlier than a start time associated with the memory operation plus the determined throttle interval.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: March 23, 2021
    Assignee: Western Digital Technologies, Inc.
    Inventors: Mervyn Wongso, Rushang Karia, Edoardo Daelli, Jacob Schmier, Kevin Corbin, Lakshmana Rao Chintada
  • Supervised Learning With Closed Loop Feedback To Improve Input Output Consistency Of Solid State Drives
    Publication number: 20210081106
    Abstract: A method and apparatus is disclosed for using supervised learning with closed loop feedback to improvement of output consistency for memory arrangements, such as a solid state drive.
    Type: Application
    Filed: November 30, 2020
    Publication date: March 18, 2021
    Inventors: Rushang KARIA, Mervyn WONGSO, Jacob SCHMIER, Kevin CORBIN, Lakshmana Rao CHINTADA
  • Supervised learning with closed loop feedback to improve ioconsistency of solid state drives
    Patent number: 10877667
    Abstract: A method and apparatus is disclosed for using supervised learning with closed loop feedback to improvement of output consistency for memory arrangements, such as a solid state drive.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: December 29, 2020
    Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: Rushang Karia, Mervyn Wongso, Jacob Schmier, Kevin Corbin, Lakshmana Rao Chintada
  • SUPERVISED LEARNING WITH CLOSED LOOP FEEDBACK TO IMPROVE IOCONSISTENCY OF SOLID STATE DRIVES
    Publication number: 20180329626
    Abstract: A method and apparatus is disclosed for using supervised learning with closed loop feedback to improvement of output consistency for memory arrangements, such as a solid state drive.
    Type: Application
    Filed: April 6, 2018
    Publication date: November 15, 2018
    Inventors: Rushang KARIA, Mervyn WONGSO, Jacob SCHMIER, Kevin CORBIN, Lakshmana Rao CHINTADA
  • METHOD AND SYSTEM FOR INPUT-OUTPUT THROTTLING TO IMPROVE QUALITY OF SERVICE IN A SOLID STATE DRIVE
    Publication number: 20180173464
    Abstract: A non-volatile memory (NVM) system receives host requests that each specify a memory operation to be performed by the NVM system, the specified memory operations including read operations and write operations, and performs a set of operations for each memory operation specified by a received host request. The set of operations performed for each such memory operation include: initiating performance the memory operation; determining a throttle interval for the memory operation in accordance with at least a first factor, corresponding to available space in a write cache of the non-volatile memory system, and a second factor, corresponding to a metric corresponding to prevalence of write operations in the memory operations specified by the received host requests; and returning to the host system a response associated with the memory operation at a time no earlier than a start time associated with the memory operation plus the determined throttle interval.
    Type: Application
    Filed: August 31, 2017
    Publication date: June 21, 2018
    Applicant: Western Digital Technologies, Inc.
    Inventors: Mervyn Wongso, Rushang Karia, Edoardo DaeIli, Jacob Schmier, Kevin Corbin, Lakshmana Rao Chintada