Patents by Inventor Russ Tuck

Russ Tuck has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050222903
    Abstract: An asynchronous and opportunistically available scheme under which a user's e-mail (or a document including e-mail content) is rendered immediately, and later updated with appropriate advertisements if and when they became available, is described. This scheme ensures that the availability of advertisements will not adversely affect the rendering of the e-mail content. For example, a Web-based e-mail server may facilitate the serving of advertisements with e-mail by (a) accepting a request for a document including e-mail, (b) generating a request identifier, (c) serving the requested document in association with the request identifier, and (d) obtaining at least one ad relevant to content of the e-mail. The Web-based e-mail server may further (e) store the obtained ad(s), (f) accept an ad request, (g) read the stored ad(s) using information from the ad request, and (h) serve the ad(s).
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Inventors: Paul Buchheit, Yingwei Cui, Jing Lim, Narayanan Shivakumar, Michael Tsao, Russ Tuck
  • Patent number: 6870844
    Abstract: A multicast engine is provided in plurality within a router for replicating and/or modifying packets identified as multicast packets. In preferred embodiments the engine is integrated with one or more ports of a router, particularly with one or more ports of fabric cards. In one implementation the multicast engine is associated with a table having instructions for replicating or modifying multicast packets received, and forwarding the packets accordingly.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: March 22, 2005
    Assignee: Pluris, Inc.
    Inventors: Russ Tuck, David Skirmont, Puneet Agarwal
  • Patent number: 6839359
    Abstract: A line card for a data packet router interfaces to a high-speed standard data link, and has a first portion interfacing to the router and having a plurality of slower ports, and a second portion having a framer compatible with and coupled to the data link. The framer is coupled through an ingress and an egress data path between the framer and the slower ports, each with separate ingress buffers and egress buffers for each port. An interface control circuit controls data packet transfers between the slower ports and the framer in both directions. In a preferred embodiment a function is used by the control circuit to map packets from the link to the ports, using keys extracted from the incoming packets. For an IP packet the key is the source address, destination address (SA/DA)pair, which constrains packets for same IP conversations to be routed by the same path.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: January 4, 2005
    Assignee: Pluris, Inc.
    Inventors: David Skirmont, Jeff Cuppett, Russ Tuck
  • Patent number: 6553005
    Abstract: A method for routing a packet received in a packet router is taught, the method comprising the steps of selecting a logical interface having multiple physical ports as a destination for the packet, processing any one or more addresses or labels of the packet and other packets received by a common function, producing thereby results unique to the packets in which the addresses and labels processed differ, (c) mapping the physical ports at the destination to the unique results produced by processing the addresses or labels of packets, and (d) routing the data packet according to the mapping. Weighting is applied to physical ports in the mapping, the weighting reflecting different transmission capacities of the ports. Apparatus for practicing the invention is taught as well.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: April 22, 2003
    Assignee: Pluris, Inc.
    Inventors: David Skirmont, Puneet Agarwal, Russ Tuck
  • Publication number: 20020136208
    Abstract: A line card for a data packet router interfaces to a high-speed standard data link, and has a first portion interfacing to the router and having a plurality of slower ports, and a second portion having a framer compatible with and coupled to the data link. The framer is coupled through an ingress and an egress data path between the framer and the slower ports, each with separate ingress buffers and egress buffers for each port. An interface control circuit controls data packet transfers between the slower ports and the framer in both directions. In a preferred embodiment a function is used by the control circuit to map packets from the link to the ports, using keys extracted from the incoming packets. For an IP packet the key is the source address, destination address (SA/DA)pair, which constrains packets for same IP conversations to be routed by the same path.
    Type: Application
    Filed: May 20, 2002
    Publication date: September 26, 2002
    Inventors: David Skirmont, Jeff Cuppett, Russ Tuck
  • Publication number: 20020126669
    Abstract: A multicast engine is provided in plurality within a router for replicating and/or modifying packets identified as multicast packets. In preferred embodiments the engine is integrated with one or more ports of a router, particularly with one or more ports of fabric cards. In one implementation the multicast engine is associated with a table having instructions for replicating or modifying multicast packets received, and forwarding the packets accordingly.
    Type: Application
    Filed: May 10, 2001
    Publication date: September 12, 2002
    Inventors: Russ Tuck, David Skirmont, Puneet Agarwal
  • Patent number: 6385209
    Abstract: A line card for a data packet router interfaces to a high-speed standard data link, and has a first portion interfacing to the router and having a plurality of slower ports, and a second portion having a framer compatible with and coupled to the data link. The framer is coupled through an ingress and an egress data path between the framer and the slower ports, each with separate ingress buffers and egress buffers for each port. An interface control circuit controls data packet transfers between the slower ports and the framer in both directions. In a preferred embodiment a function is used by the control circuit to map packets from the link to the ports, using keys extracted from the incoming packets. For an IP packet the key is the source address, destination address (SA/DA) pair, which constrains packets for same IP conversations to be routed by the same path.
    Type: Grant
    Filed: June 14, 2000
    Date of Patent: May 7, 2002
    Assignee: Pluris, Inc.
    Inventors: David Skirmont, Jeff Cuppett, Russ Tuck