Abstract: Embodiments of the present invention are directed to methods, systems, and circuitry for reduced error in power consumption estimation for distinct circuitries. A non-limiting example includes distinct circuitry having an optimized power consumption definition. The distinct circuitry includes a substrate. The distinct circuitry includes an arrangement of interoperable hardware components disposed on the substrate having input pins defined according to a model described by a hardware description language operable to emulate toggle events of the interoperable hardware components defined by the model having a toggle event count based on combinations of the toggle events that correspond to predetermined power quantities. The toggle events define an aggregate toggle power consumption closer to an actual power consumption than an aggregate pin power consumption based on the input pins.

Abstract: A method for testing a circuit includes receiving, by a noise injection circuit, an input signal and generating a noise pulse. Generating the noise pulse includes computing an input resistor pulse, and computing an output resistor pulse. Generating the noise pulse further includes short-circuiting an output resistor substantially simultaneously with opening an input resistor. The method for testing the circuit includes modifying, by the noise injection circuit, the input signal using the noise pulse.

Abstract: An aspect a bit selection path configured to propagate a bit selection signal. The bit selection path includes bit selection delay circuitry defining a bit selection delay. The memory array includes a row selection path configured to propagate a row selection signal. The row selection path includes row selection delay circuitry defining a row selection delay. The memory array includes local selection circuitry. The local selection circuitry is configured to receive the bit selection signal from the bit selection path before the row selection signal from the row selection path according to the bit selection delay and the row selection delay.

Abstract: An aspect a bit selection path configured to propagate a bit selection signal. The bit selection path includes bit selection delay circuitry defining a bit selection delay. The memory array includes a row selection path configured to propagate a row selection signal. The row selection path includes row selection delay circuitry defining a row selection delay. The memory array includes local selection circuitry. The local selection circuitry is configured to receive the bit selection signal from the bit selection path before the row selection signal from the row selection path according the bit selection delay and the row selection delay.

Abstract: Embodiments of the present invention are directed to methods, systems, and circuitry for reduced error in power consumption estimation for distinct circuitries. A non-limiting example includes distinct circuitry having an optimized power consumption definition. The distinct circuitry includes a substrate. The distinct circuitry includes an arrangement of interoperable hardware components disposed on the substrate having input pins defined according to a model described by a hardware description language operable to emulate toggle events of the interoperable hardware components defined by the model having a toggle event count based on combinations of the toggle events that correspond to predetermined power quantities. The toggle events define an aggregate toggle power consumption closer to an actual power consumption than an aggregate pin power consumption based on the input pins.

Abstract: A method for testing a circuit includes receiving, by a noise injection circuit, an input signal and generating a noise pulse. Generating the noise pulse includes computing an input resistor pulse, and computing an output resistor pulse. Generating the noise pulse further includes short-circuiting an output resistor substantially simultaneously with opening an input resistor. The method for testing the circuit includes modifying, by the noise injection circuit, the input signal using the noise pulse.

Abstract: According to one or more embodiments of the present invention, a delay circuit includes a first sub-circuit that delays a leading edge of an input signal according to first control settings, the input signal being for an electric device. The delay circuit further includes a second sub-circuit that delays a trailing edge of the input signal according to second control settings. An output signal from the delay circuit is received by the electric device.

Abstract: A piston has a piston body with a pair of pin bosses having pin bores aligned along a central axis. The pin bores have bearing surfaces, wherein at least one recess extends axially across at least one of the bearing surfaces. A groove extends partially about the bearing surface circumference and is arranged in fluid communication with the recess. The recess and groove provide a lubrication feature to the pin bore, while the bearing surface has an uninterrupted portion for enhanced load carrying capacity.

Abstract: A piston has a piston body with a pair of pin bosses having pin bores aligned along a central axis. The pin bores have bearing surfaces, wherein at least one recess extends axially across at least one of the bearing surfaces. A groove extends partially about the bearing surface circumference and is arranged in fluid communication with the recess. The recess and groove provide a lubrication feature to the pin bore, while the bearing surface has an uninterrupted portion for enhanced load carrying capacity.

Abstract: A protective garment of the type typically worn by firefighters includes an improved liner assembly. The liner assembly comprises a lining fabric made from multifilament yarns in one weave direction and spun yarns in the other weave direction. The yarns are woven together to produce a first side of higher lubricity and a second side of lesser lubricity. The higher lubricity side forms an outer surface of the liner assembly to reduce friction otherwise caused by rubbing against adjacent surfaces, such as the firefighter's clothing.

Abstract: A protective garment of the type typically worn by firefighters includes an improved liner assembly. The liner assembly comprises a lining fabric made from multifilament yarns in one weave direction and spun yarns in the other weave direction. The yarns are woven together using a satin weave to produce a first side of higher lubricity and a second side of lesser lubricity. The higher lubricity side forms an outer surface of the liner assembly to reduce friction otherwise caused by rubbing against adjacent surfaces, such as the firefighter's clothing.

Abstract: An improved sanitizing formulation contains a peroxy hydrate compound, a non-phosphate water softener, a source of magnesium ion as a partial hydrogen peroxide stabilizer, a chelating agent for transition metals and a nonionic surfactant.