Patents by Inventor Russell Budd

Russell Budd has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180267248
    Abstract: A photonic waveguide structure may include a tapered photonic waveguide structure within a photonic substrate, such that the tapered photonic waveguide structure has a tapered region that progressively tapers in width along a longitudinal length of the tapered photonic waveguide structure. The photonic waveguide structure also includes an optical fiber waveguide having a core region and a cladding region, whereby a portion of the core region is partially exposed by removing a portion of the cladding region. An outer surface of the portion of the core region that is partially exposed is substantially coupled to the tapered photonic waveguide structure. An optical signal propagating along the tapered photonic waveguide structure is coupled from the tapered region of the tapered photonic waveguide structure to the core region of the optical fiber waveguide via the core region that is partially exposed.
    Type: Application
    Filed: May 16, 2018
    Publication date: September 20, 2018
    Inventor: Russell A. Budd
  • Patent number: 10042120
    Abstract: A photonic waveguide structure may include a tapered photonic waveguide structure within a photonic substrate, such that the tapered photonic waveguide structure has a tapered region that progressively tapers in width along a longitudinal length of the tapered photonic waveguide structure. The photonic waveguide structure also includes an optical fiber waveguide having a core region and a cladding region, whereby a portion of the core region is partially exposed by removing a portion of the cladding region. An outer surface of the portion of the core region that is partially exposed is substantially coupled to the tapered photonic waveguide structure. An optical signal propagating along the tapered photonic waveguide structure is coupled from the tapered region of the tapered photonic waveguide structure to the core region of the optical fiber waveguide via the core region that is partially exposed.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventor: Russell A. Budd
  • Publication number: 20180217329
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Application
    Filed: March 26, 2018
    Publication date: August 2, 2018
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10025029
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: July 17, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10007057
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: June 26, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 10001598
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: June 19, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 9977185
    Abstract: An optoelectronic device includes an integrated circuit including electronic devices formed on a front side of a semiconductor substrate. A barrier layer is formed on a back side of the semiconductor substrate. A photonics layer is formed on the barrier layer. The photonics layer includes a core for transmission of light and a cladding layer encapsulating the core and including a different index of refraction than the core. The core is configured to couple light generated from a component of the optoelectronic device.
    Type: Grant
    Filed: November 9, 2016
    Date of Patent: May 22, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Patent number: 9958625
    Abstract: A structured substrate for optical fiber alignment is produced at least in part by forming a substrate with a plurality of buried conductive features and a plurality of top level conductive features. At least one of the plurality of top level conductive features defines a bond pad. A groove is then patterned in the substrate utilizing a portion of the plurality of top level conductive features as an etch mask and one of the plurality of buried conductive features as an etch stop. At least a portion of an optical fiber is placed into the groove.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: May 1, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Russell A. Budd, Paul F. Fortier
  • Publication number: 20180114785
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Application
    Filed: December 11, 2017
    Publication date: April 26, 2018
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 9935089
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 9935088
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: April 3, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 9927574
    Abstract: An optical component includes a component body, and at least one angled-facet waveguide formed in the component body, wherein the angled-facet waveguide is substantially mirror-symmetrical in shape relative to a line at or near the center of the angled-facet waveguide.
    Type: Grant
    Filed: January 31, 2017
    Date of Patent: March 27, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Daniel M. Kuchta, Benjamin Giles Lee, Laurent Schares, Clint Lee Schow
  • Patent number: 9915784
    Abstract: Aspects of the invention are directed to a method for forming an optical waveguide structure. Initially, a base film stack is received with an optical waveguide feature covered by a lower dielectric layer. An etch stop feature is then formed on the lower dielectric layer, and an upper dielectric layer is formed over the etch stop feature. Subsequently, a trench is patterned in the upper dielectric layer and the etch stop feature at least in part by utilizing the etch stop feature as an etch stop. Lastly, a waveguide coupler feature is formed in the trench, at least a portion of the waveguide coupler feature having a refractive index higher than the lower dielectric layer and the upper dielectric layer. The waveguide coupler feature is positioned over at least a portion of the optical waveguide feature but is separated from the optical waveguide feature by a portion of the lower dielectric layer.
    Type: Grant
    Filed: August 6, 2015
    Date of Patent: March 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Russell A. Budd, Fuad E. Doany, Christopher V. Jahnes, Benjamin G. Lee, Laurent Schares
  • Publication number: 20180040597
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 8, 2018
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Publication number: 20180011246
    Abstract: A system comprises a first optical component comprising a component body; at least a first waveguide formed in the component body, wherein the first waveguide is substantially mirror-symmetrical in shape relative to a line at or near the center of the first waveguide; and a self-alignment feature configured to assist in optically-coupling the first waveguide with a second waveguide located outside of the component body.
    Type: Application
    Filed: September 5, 2017
    Publication date: January 11, 2018
    Inventors: Russell A. Budd, Daniel M. Kuchta, Benjamin Giles Lee, Laurent Schares, Clint Lee Schow
  • Patent number: 9857531
    Abstract: A system comprises a first optical component comprising at least one waveguide and at least one self-alignment feature; and a second optical component comprising at least another waveguide and at least another self-alignment feature; wherein the self-alignment feature of the second optical component engage to assist in optically-coupling the waveguide of the first optical component and the waveguide of the second optical component when the first optical component has a manufacturing tolerance in a given geometric dimension and is mounted in the second optical component.
    Type: Grant
    Filed: November 3, 2016
    Date of Patent: January 2, 2018
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Daniel M. Kuchta, Benjamin Giles Lee, Laurent Schares, Clint Lee Schow
  • Patent number: 9786641
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart
  • Patent number: 9772463
    Abstract: An optical interconnect is located on a surface of a semiconductor handle substrate. The optical interconnect includes a waveguide core material portion that is completely surrounded on all four sides by a dielectric oxide-containing cladding structure. The dielectric oxide-containing material of the dielectric oxide-containing cladding structure that is located laterally adjacent end segments of the waveguide core material portion is configured to include a sidewall surface that can receive and transmit light. A plurality of semiconductor devices can be formed above the topmost dielectric oxide-containing material of the dielectric oxide-containing cladding structure.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: September 26, 2017
    Assignee: International Business Machines Corporation
    Inventors: Russell A. Budd, Effendi Leobandung, Ning Li, Jean-Olivier Plouchart, Devendra K. Sadana
  • Publication number: 20170261706
    Abstract: A structured substrate for optical fiber alignment is produced at least in part by forming a substrate with a plurality of buried conductive features and a plurality of top level conductive features. At least one of the plurality of top level conductive features defines a bond pad. A groove is then patterned in the substrate utilizing a portion of the plurality of top level conductive features as an etch mask and one of the plurality of buried conductive features as an etch stop. At least a portion of an optical fiber is placed into the groove.
    Type: Application
    Filed: May 22, 2017
    Publication date: September 14, 2017
    Inventors: Russell A. Budd, Paul F. Fortier
  • Publication number: 20170186670
    Abstract: Package structures and methods are provided to integrate optoelectronic and CMOS devices using SOI semiconductor substrates for photonics applications. For example, a package structure includes an integrated circuit (IC) chip, and an optoelectronics device and interposer mounted to the IC chip. The IC chip includes a SOI substrate having a buried oxide layer, an active silicon layer disposed adjacent to the buried oxide layer, and a BEOL structure formed over the active silicon layer. An optical waveguide structure is patterned from the active silicon layer of the IC chip. The optoelectronics device is mounted on the buried oxide layer in alignment with a portion of the optical waveguide structure to enable direct or adiabatic coupling between the optoelectronics device and the optical waveguide structure. The interposer is bonded to the BEOL structure, and includes at least one substrate having conductive vias and wiring to provide electrical connections to the BEOL structure.
    Type: Application
    Filed: March 13, 2017
    Publication date: June 29, 2017
    Inventors: Russell A. Budd, Mounir Meghelli, Jason Scott Orcutt, Jean-Olivier Plouchart