Abstract: Embodiments described herein relate to flat optical devices with a coating layer including monolayers selected from the group consisting of molybdenum disulfide (MoS2), tungsten disulfide (WS2), tungsten diselenide (WSe2), molybdenum diselenide (MoSe2), molybdenum ditelluride (MoTe2), titanium disulfide (TlS2), zirconium disulfide (ZrS2), zirconium diselenide (ZrSe2), hafnium disulfide (HfS2), platinum disulfide (PtS2), tin disulfide (SnS2), or combinations thereof. The coating layer is disposed over a plurality of optical device structures of the optical device. The monolayers may alternate between the materials to form the coating layer or may be a uniform coating layer of a single material. The coating layer is disposed over each optical device structure of the plurality of optical device structures.

Abstract: A method of forming a substrate carrier is provided. The method includes forming a first electrode over a first surface of a substrate, the first electrode arranged in a first pattern including a plurality of segments, wherein portions of the plurality of segments are spaced apart from each other by a plurality of gaps; and dispensing a plurality of droplets of a dielectric material over the substrate and into the plurality of gaps. The plurality of droplets includes a first droplet and a second droplet, the first droplet is dispensed onto a first location over the substrate, the second droplet is dispensed onto a second location over the substrate, a size of the first droplet is at least 10% larger than a size of the second droplet.

Abstract: An electro-optical waveguide modulator device includes a seed layer on a substrate, the seed layer having a first crystallographic plane aligned with a surface of the seed layer, an electro-optical channel extending in a first direction on the seed layer and having a second crystallographic plane aligned with the surface of the seed layer, an insulator layer on both sides of the electro-optical channel on the substrate in a second direction perpendicular to the first direction, an electrode barrier layer on the electro-optical channel and the insulator layer, and one or more of electrodes extending in the second direction. The seed layer and the insulator layer each comprise material having a refractive index that is lower than the electro-optical channel.

Abstract: Electronic devices and methods of forming electronic devices using a reduced number of hardmask materials and reusing lithography reticles are described. Patterned substrates are formed using a combination of etch selective hardmask materials and reusing reticles to provide a pattern of repeating trapezoidal and rhomboidal openings.

Abstract: Embodiments of the present disclosure generally relate to methods of forming a capacitor for DRAM. The method begins by preparing a substrate for forming the capacitor. A bottom electrode is formed on the top surface of the substrate. A dielectric layer is formed in contact with the bottom electrode. The material of the dielectric layer is one of a barium titanate, BaTiO3 (BTO) strontium titanate, SrTiO3 (STO), barium strontium titanate, BaSrTiO3 (BSTO), ZrSTO, ZrBTO, or ZrBSTO. A top electrode is formed on the dielectric layer and then a cap is formed on the top electrode.

Abstract: Electronic devices and methods of forming electronic devices using a reduced number of hardmask materials and reusing lithography reticles are described. Patterned substrates are formed using a combination of etch selective hardmask materials and reusing reticles to provide a pattern of repeating trapezoidal and rhomboidal openings.

Abstract: Electronic devices and methods of forming electronic devices using a reduced number of hardmask materials and reusing lithography reticles are described. Patterned substrates are formed using a combination of etch selective hardmask materials and reusing reticles to provide a pattern of repeating trapezoidal and rhomboidal openings.

Abstract: Exemplary processing methods may include depositing a boron-containing material or a silicon-and-boron-containing material on a substrate disposed within a processing region of a semiconductor processing chamber. The methods may include etching portions of the boron-containing material or the silicon-and-boron-containing material with a chlorine-containing precursor to form one or more features in the substrate. The methods may also include removing remaining portions of the boron-containing material or the silicon-and-boron-containing material from the substrate with a fluorine-containing precursor.

Abstract: Embodiments described herein relate to encapsulated optical devices and methods of forming optical devices with controllable air-gapped encapsulation. In one embodiment, a plurality of openings are formed in a support layer surrounding the plurality of optical device structures to create a high refractive index contrast between the optical device structures, the support layer, and the openings. In another embodiment, sacrificial material is disposed in-between the optical device structures and then an encapsulation layer is disposed on the optical device structures. The sacrificial material is removed, forming a space bounded by the encapsulation layer, the substrate, and each of the optical device structures. In yet another embodiment, the encapsulation layer is disposed over the optical device structures forming a space bounded by the encapsulation layer, the substrate, and each of the optical device structures.

Abstract: An electro-optical waveguide modulator device includes a seed layer on a substrate, the seed layer having a first crystallographic plane aligned with a surface of the seed layer, an electro-optical channel extending in a first direction on the seed layer and having a second crystallographic plane aligned with the surface of the seed layer, an insulator layer on both sides of the electro-optical channel on the substrate in a second direction perpendicular to the first direction, an electrode barrier layer on the electro-optical channel and the insulator layer, and one or more of electrodes extending in the second direction. The seed layer and the insulator layer each comprise material having a refractive index that is lower than the electro-optical channel.

Abstract: Memory devices and methods of forming memory devices are described. Specifically, dynamic random-access memory (DRAM) devices are provided with a capacitor landing pad able to connect a 6f2 layout to a 4f2 layout. In some embodiments, the capacitor landing pad has a plurality of air gaps.

Abstract: Methods and apparatus for inspecting features on a substrate including exposing at least a portion of the substrate to a first electron beam landing energy to obtain a first image; exposing the at least a portion of the substrate to a second electron beam landing energy to obtain a second image, wherein the second electron beam landing energy is different from the first electron beam landing energy; realigning the first image and the second image to a feature on the substrate; and determining from at least one measurement from the first image associated with the feature and at least one measurement from the second image associated with the feature if the feature is leaning or twisting.

Abstract: Gate all-around devices are disclosed in which an angled channel comprising a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.

Abstract: Electronic devices and methods of forming electronic devices using a reduced number of hardmask materials and reusing lithography reticles are described. Patterned substrates are formed using a combination of etch selective hardmask materials and reusing reticles to provide a pattern of repeating trapezoidal and rhomboidal openings.

Abstract: Methods and apparatus for inspecting features on a substrate including exposing at least a portion of the substrate to a first electron beam landing energy to obtain a first image; exposing the at least a portion of the substrate to a second electron beam landing energy to obtain a second image, wherein the second electron beam landing energy is different from the first electron beam landing energy; realigning the first image and the second image to a feature on the substrate; and determining from at least one measurement from the first image associated with the feature and at least one measurement from the second image associated with the feature if the feature is leaning or twisting.

Abstract: Gate all-around devices are disclosed in which an angled channel comprising a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.

Abstract: Gate all-around devices are disclosed in which an angled channel including a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.

Abstract: Gate all-around devices are disclosed in which an angled channel including a semiconducting nanostructure is located between a source and a drain. The angled channel has an axis that is oriented at an angle to the top surface of the substrate at an angle in a range of about 1° to less than about 90°. The gate all-around device is intended to meet design and performance criteria for the 7 nm technology generation.