Abstract: The present invention provides recombinant gram-negative host cells that do not degrade protease-sensitive recombinant proteins yet grow to high cell density, methods for the use of these host cells to produce high-quality recombinant proteins, including antibodies and antibody fragments, at high yield, as well as compositions and methods relating to periplasmic expression of recombinant proteins or polypeptides of interest in host cells.

Abstract: An inflatable structure includes a plurality of inflatable walls arranged to form a room having an interior and one or more lockable compartments integrated into the plurality of inflatable walls. The lockable compartments can include a non-inflated recess formed within an inflatable wall and at least one flap configured to close an opening of the recess of the first lockable compartment. The inflatable structure can be themed, e.g., by installing themed skins on interior surfaces of the room to provide a user experience. The inflatable structure may also include integrated virtual reality components, including a virtual reality headset supported by the structure.

Abstract: The production of a diutan polysaccharide exhibiting increased viscosity properties as compared with previously produced polysaccharide of the same type of repeating units. Such an improved diutan polysaccharide is produced through the generation of a derivative of Sphingomonas sp. ATCC 53159 that harbors a multicopy broad host-range plasmid into which genes for biosynthesis of diutan polysaccharide have been cloned. The inventive methods of production of such an improved diutan polysaccharide, as well as the novel cloned genes required to produce the improved diutan within such a method, are also encompassed within this invention. Additionally, the novel engineered Sphingomonas strain including the needed DNA sequence is encompassed within this invention.

Abstract: Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wake up signal is powered down. A low speed reference clock signal is still received by the USB PHY, and a medium speed clock within the USB PHY is activated once per period of the low speed reference clock signal. The medium speed clock activates the signal detection circuitry and samples a line for the LFPS. If no LFPS is detected, the signal detection circuitry and the medium speed clock return to low power until the next period of the low speed reference clock signal. If the LFPS is detected, the USB PHY returns to a U0 active power state.

Abstract: Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wake up signal is powered down. A low speed reference clock signal is still received by the USB PHY, and a medium speed clock within the USB PHY is activated once per period of the low speed reference clock signal. The medium speed clock activates the signal detection circuitry and samples a line for the LFPS. If no LFPS is detected, the signal detection circuitry and the medium speed clock return to low power until the next period of the low speed reference clock signal. If the LFPS is detected, the USB PHY returns to a U0 active power state.

Abstract: Aspects disclosed in the detailed description include high-frequency signal observations in electronic systems. In this regard, a high-frequency signal observation circuit is provided in an electronic system to enable high-frequency signal observations. In one aspect, the high-frequency signal observation circuit comprises an observation signal selection circuit. The observation signal selection circuit is programmably controlled to select an observation signal among a plurality of electronic input signals (e.g., control signals) received from the electronic system. In another aspect, the high-frequency signal observation circuit is configured to utilize a bypass data path, which is routed around serializer/deserializer (SerDes) logic in the electronic system, to output the observation signal for observation. By programmably selecting the observation signal and outputting the observation signal via the bypass data path, it is possible to examine accurately any high-frequency signal (e.g.

Abstract: Methods and systems for shared control of a phase locked loop (PLL) for a multi-port physical layer (PHY) are disclosed. In one aspect, an arbitration logic circuit is coupled to ports of a multi-port PHY sharing a phase locked loop (PLL). Upon receiving an indication that the shared PLL is to be reset, the arbitration logic circuit commands the ports sharing the PLL to enter a state in which any reset of the shared PLL would have minimal or no effect in their operations. In this manner, an integrated circuit (IC) including a multi-port PHY may be configured with only one PLL and associated clock generating logic to provide a clock signal for some or all of its ports, thus reducing its semiconductor area and power consumption. Furthermore, the ports of the multi-port PHY may operate independently from each other obviating any configuration and/or interoperability problems associated with having a shared PLL.

Abstract: A portable inflatable race track comprising a base, at least one wall, and a race surface, wherein the base is at least partially inflatable from a collapsed position to an inflated position, the race surface is inclined relative to horizontal and includes at least one lane configured to accept a vehicle comprising wheels, wherein at least gravity causes the vehicle to travel down the race surface. The race track may include a starting section, a sloped section, a finish section, and a stopping section. The race track may be configured to allow two or more vehicles to simultaneously race down the race surface.

Abstract: Aspects disclosed in the detailed description include apparatuses, methods, and systems for glitch-free clock switching. In this regard, in one aspect, an electronic circuit is switched from a lower-frequency reference clock to a higher-frequency reference clock. An oscillation detection logic is configured to determine the stability of the higher-frequency reference clock prior to switching the electronic circuit to the higher-frequency reference clock. The oscillation detection logic derives a sampled clock signal from the higher-frequency reference clock, wherein the sampled clock signal has a slower frequency than the lower-frequency reference clock. The oscillation detection logic then compares the sampled clock signal against the lower-frequency reference clock to determine the stability of the higher-frequency reference clock.

Abstract: Methods and systems for shared control of a phase locked loop (PLL) for a multi-port physical layer (PHY) are disclosed. In one aspect, an arbitration logic circuit is coupled to ports of a multi-port PHY sharing a phase locked loop (PLL). Upon receiving an indication that the shared PLL is to be reset, the arbitration logic circuit commands the ports sharing the PLL to enter a state in which any reset of the shared PLL would have minimal or no effect in their operations. In this manner, an integrated circuit (IC) including a multi-port PHY may be configured with only one PLL and associated clock generating logic to provide a clock signal for some or all of its ports, thus reducing its semiconductor area and power consumption. Furthermore, the ports of the multi-port PHY may operate independently from each other obviating any configuration and/or interoperability problems associated with having a shared PLL.

Abstract: Aspects disclosed in the detailed description include apparatuses, methods, and systems for glitch-free clock switching. In this regard, in one aspect, an electronic circuit is switched from a lower-frequency reference clock to a higher-frequency reference clock. An oscillation detection logic is configured to determine the stability of the higher-frequency reference clock prior to switching the electronic circuit to the higher-frequency reference clock. The oscillation detection logic derives a sampled clock signal from the higher-frequency reference clock, wherein the sampled clock signal has a slower frequency than the lower-frequency reference clock. The oscillation detection logic then compares the sampled clock signal against the lower-frequency reference clock to determine the stability of the higher-frequency reference clock.

Abstract: Aspects disclosed in the detailed description include high-frequency signal observations in electronic systems. In this regard, a high-frequency signal observation circuit is provided in an electronic system to enable high-frequency signal observations. In one aspect, the high-frequency signal observation circuit comprises an observation signal selection circuit. The observation signal selection circuit is programmably controlled to select an observation signal among a plurality of electronic input signals (e.g., control signals) received from the electronic system. In another aspect, the high-frequency signal observation circuit is configured to utilize a bypass data path, which is routed around serializer/deserializer (SerDes) logic in the electronic system, to output the observation signal for observation. By programmably selecting the observation signal and outputting the observation signal via the bypass data path, it is possible to examine accurately any high-frequency signal (e.g.

Abstract: Systems and methods for conserving power in a universal serial bus (USB) are disclosed. In one aspect, when a USB device enters a low power mode (e.g., U1 or U2), a clock associated with the USB device is modified to also enter a low power mode. Since the PIPE interface associated with the USB device still requires a clock signal, the low power clock mode must still be able to provide the PIPE interface with a clock signal. However, the clock signal to the PIPE interface does not need to be the same frequency or accuracy as the clock signal used by the USB interface. The modification to the clock changes the clock frequency to a low frequency compared to the normal clock frequency. By using a low frequency clock for the PIPE interface, power is conserved while preserving the functionality of the PIPE interface.

Abstract: A portable inflatable race track comprising a base, at least one wall, and a race surface, wherein the base is at least partially inflatable from a collapsed position to an inflated position, the race surface is inclined relative to horizontal and includes at least one lane configured to accept a vehicle comprising wheels, wherein at least gravity causes the vehicle to travel down the race surface. The race track may include a starting section, a sloped section, a finish section, and a stopping section. The race track may be configured to allow two or more vehicles to simultaneously race down the race surface.

Abstract: The production of a diutan polysaccharide exhibiting increased viscosity properties as compared with previously produced polysaccharide of the same type of repeating units. Such an improved diutan polysaccharide is produced through the generation of a derivative of Sphingomonas sp. ATCC 53159 that harbors a multicopy broad host-range plasmid into which genes for biosynthesis of diutan polysaccharide have been cloned. The inventive methods of production of such an improved diutan polysaccharide, as well as the novel cloned genes required to produce the improved diutan within such a method, are also encompassed within this invention. Additionally, the novel engineered Sphingomonas strain including the needed DNA sequence is encompassed within this invention.

Abstract: An inflatable obstacle course having a base and one or more inflatable side walls connected to the base and forming a housing. The obstacle course can include one or more obstacles positioned within the housing. The side walls can be adhered to the base to form a water seal. A layer of fluid can be positioned within at least a portion of the housing to provide resistance to participants moving through the obstacle course and to add to the fun of traversing the obstacle course.

Abstract: The production of a diutan polysaccharide exhibiting increased viscosity properties as compared with previously produced polysaccharide of the same type of repeating units. Such an improved diutan polysaccharide is produced through the generation of a derivative of Sphingomonas sp. ATCC 53159 that harbors a multicopy broad host range plasmid into which genes for biosynthesis of diutan polysaccharide have been cloned. The inventive methods of production of such an improved diutan polysaccharide, as well as the novel cloned genes required to produce the improved diutan within such a method, are also encompassed within this invention. Additionally, the novel engineered Sphingomonas strain including the needed DNA sequence is encompassed within this invention.

Abstract: A method supplies or creates a generic electronic index for a hardcopy printed item. The generic electronic index is based on the text within the hardcopy printed item. From this generic electronic index, the method creates a plurality of custom electronic indices from the generic electronic index. Such custom electronic indices can be based on user input and/or user feedback or can be created by marketing agencies, educational institutions, etc. Each of the custom electronic indices is a variant of the generic electronic index, and each of the custom electronic indices is adapted to a different target audience.

Abstract: The present disclosure provides a method of assigning media access control (MAC) addresses to image paths for a printing system. The method comprises: initializing a MAC address to each image path board in the printing system wherein the printing system includes at least two print engines each having an image path board; modifying a card cage enclosure to include a bit selector for each image path board; and, creating a unique IP address for each MAC address including generating a unique octet for each MAC address. A slot ID is used for the generating of the unique octet for each MAC address having a standard base value.

Abstract: The production of a diutan polysaccharide exhibiting increased viscosity properties as compared with previously produced polysaccharide of the same type of repeating units. Such an improved diutan polysaccharide is produced through the generation of a derivative of Sphingomonas sp. ATCC 53159 that harbors a multicopy broad host range plasmid into which genes for biosynthesis of diutan polysaccharide have been cloned. The inventive methods of production of such an improved diutan polysaccharide, as well as the novel cloned genes required to produce the improved diutan within such a method, are also encompassed within this invention. Additionally, the novel engineered Sphingomonas strain including the needed DNA sequence is encompassed within this invention.