Abstract: Large area organic electronic devices having a doped conducting polymer buffer layer are described. Methods for applying a doped conducting polymer buffer layer to an electrode-coated large area substrate are described. The methods include web coating techniques such as microgravure coating or meniscus coating, which may be used in continuous coating processes.

Abstract: The present invention relates to a &bgr;3 adrenergic receptor agonist of formula (I) or a pharmaceutical salt thereof, which is capable of increasing lipolysis and energy expenditure in cells and, therefore, is useful for treating Type II diabetes and/or obesity. The compound can also be used to lower triglyceride levels and cholesterol levels or raise high density lipoprotein levels or to decrease gut motility. In addition, the compound can be used to reduced neurogenic inflammation or as an antidepressant agent. Compositions and methods for the use of the compounds in the treatment of diabetes and obesity and for lowering triglyceride levels and cholesterol levels or raising high density lipoprotein levels or for decreasing gut motility are also disclosed.

Abstract: Organic electronic devices having a conducting self-doped polymer buffer layer, particularly a self-doped polyaniline buffer layer, are described. Also described are organic light emitting diodes with buffer layers comprised of an intrinsically conducting polymer having no mobile counterions.

Abstract: Large area organic electronic devices having a doped conducting polymer buffer layer are described. Methods for applying a doped conducting polymer buffer layer to an electrode-coated large area substrate are described. The methods include web coating techniques such as microgravure coating or meniscus coating, which may be used in continuous coating processes.

Abstract: A method for installing an expandable stiffener includes providing an assembly including a first sidewall and a second sidewall connected at a leading and trailing edge such that a cavity is defined therebetween, forming an opening extending through the first sidewall and the second sidewall, inserting a first expandable sleeve through the assembly opening such that the sleeve extends between the first and second strut sidewalls, and coupling the sleeve to the first and second sidewalls.

Abstract: An internal processor/memory bus contains an address portion for transmitting addresses and commands, having a series of hierarchical uni-directional links between processors and local repeaters (ARPs), and between the ARPs and a central repeater (ASW). A command propagates from a requesting device to its local ARP, to the ASW. From the ASW, the command is broadcast to all devices on the bus by transmitting to all ARPs or directly attached memory, and from the ARPs to the devices. Preferably, the ASW globally arbitrates the address bus, and all commands propagate at pre-defined clock cycles through the bus. Preferably, each device on the bus independently signals a response via a separate response link running directly to a global collector, which collects all responses and broadcasts a single system-wide response back to the devices.

Abstract: This invention provides compounds and their pharmaceutically-acceptable salts, pharmaceutical formulations of said compounds, and methods for treating hyperglycemia associated with non-insulin dependent diabetes and for treating hyperlipidemia.

Abstract: A processor-memory bus comprises a command portion for transmitting addresses and commands, having a unidirectional input portion for transmitting commands to a central repeater unit, and a unidirectional broadcast portion for broadcasting commands from the repeater. The input portion comprises a plurality of links running from different devices, wherein each link is less than the full width of the broadcast bus portion. A command is transmitted over the input portion in a plurality of bus cycles, and broadcast over the broadcast portion in a single bus cycle. Since multiple input links connect to the central command repeater, it is possible to keep the broadcast bus full notwithstanding the fact that multiple bus cycles are required to transmit an individual command on the input portion. Preferably, the links are arranged hierarchically, from processors to local repeaters, from local repeaters to the central repeater, and back again.

Abstract: This invention provides compounds and their pharmaceutically-acceptable salts, pharmaceutical formulations of said compounds, and methods for treating hyperglycemia associated with non-insulin dependent diabetes and for treating hyperlipidemia.

Abstract: A data processing system, circuit arrangement, integrated circuit device, program product, and method utilize a data buffer with a priority-based data storage capability to handle incoming data from a plurality of available data sources. With such a capability, different relative priority levels are assigned to data associated with different data sources. Such priority levels are then used by control logic coupled to the buffer to control whether or not incoming data is stored (or optionally discarded) in the buffer. In particular, the relative priority of incoming data is compared with that associated with data currently stored in the buffer, with the incoming data being stored in the buffer only when its relative priority exceeds that of the currently-stored data.

Abstract: A method and system for transmitting address commands in a multiprocessor system comprising multiple nodes interconnected by an address bus. A request for arbitration of an address bus is transmitted from a controller within a node of multiple nodes to an arbitration switch, which controls transmission across the address bus. The address command is transmitted from the controller to the arbitration switch, in response to receiving a grant of arbitration of the address bus. The address command is then broadcast from the arbitration switch to a controller within each node of multiple nodes, in response to receiving the address command at the arbitration switch. The address command is broadcast from the controller within each node, in response to receiving the broadcast address command at the controller within each node, such that all address command transmissions on the address bus are transmitted to each processor within a multiprocessor system.

Abstract: A reduced length, pressure compensating liquid flow regulator includes a poppet defining a longitudinally extending hollow cylinder having a front sense orifice and a rear orifice. A retainer maintains a biasing spring disposed at least partially within the cylinder, the retainer including a front sidewall defining a central aperture and a rear sidewall surface defining rear side slots, the retainer front sidewall forming an annular space between the cylinder rear orifice and the retainer front sidewalls. A seat has a closed front face spaced from and facing the cylinder, side passages rearwardly of the seat front face, and a downstream passage. The biasing spring biases the cylinder rear orifice longitudinally away from the seat. A hollow housing slidably receives the cylinder and fixedly receives the retainer means and the seat, the housing directing liquid flow from the retainer side slots into the seat side passages.

Abstract: This invention provides compounds and their pharmaceutically-acceptable salts, pharmaceutical formulations of said compounds, and methods for treating hyperglycemia associated with non-insulin dependent diabetes and for treating hyperlipidemia.

Abstract: A method and system for providing cache coherence despite unordered interconnect transport. In a computer system of multiple memory devices or memory units having shared memory and an interconnect characterized by unordered transport, the method comprises sending a request packet over the interconnect from a first memory device to a second memory device requiring that an action be carried out on shared memory held by the second memory device. If the second memory device determines that the shared memory is in a transient state, the second memory device returns the request packet to the first memory device; otherwise, the request is carried out by the second memory device. The first memory device will continue to resend the request packet each time that the request packet is returned.

Abstract: A cotton harvester includes up to eight or more brush type row units mounted on a cross auger system having a split cross auger structure with two auger portions for moving material inwardly toward a central location. Cotton is conveyed through the rear of the central location into two separation chambers, one for each auger portion, and into the lower portions of two corresponding conveying ducts which extend upwardly and outwardly at bend locations located just above the rockshaft and below the cab floor. Each duct includes a nozzle directing air upwardly above the bend location so that cotton is sucked into the bend. The ducts extend upwardly at an angle to the vertical direction and include uppermost sections extending rearwardly over the input sections of the two cleaners. The uppermost sections are angled from the horizontal and distribute the cotton evenly over cleaner inlets.

Abstract: A networked computer system and method of communicating classify request packets into multiple classes, with one class devoted to non-propagable requests that may be handled locally by destination nodes in the computer system. The multiple classes of requests are separately handled in the networked computer system such that an inability of a node to handle a request in another class does not hinder the ability of the node to process non-propagable requests, thereby avoiding deadlocks in the computer system.

Abstract: A method of and an apparatus for expanding tobacco, particularly tobacco impregnated with solid carbon dioxide are disclosed. The apparatus comprises an arcuate, generally C-shaped duct for conveying the tobacco material in a hot gaseous medium to sublimate the solid carbon dioxide and expand the tobacco. The duct has a non-circular cross-section, preferably a rectangular cross-section, with a high width-to-depth ratio and an increasing depth from the inlet to an intermediate portion of the duct then a decreasing depth from the intermediate portion to the outlet of the duct. A winnower device infeeds the tobacco material into the duct adjacent the throat of a venturi section connected to the inlet of the conveying duct. A tangential separator with an adjustable baffle at the inlet thereof for controlling velocity in the separator is used to separate the expanded tobacco from the gaseous medium.

Abstract: A cotton harvester includes up to eight or more brush type row units mounted on a cross auger system having a split cross auger structure with two auger portions for moving material inwardly toward a central location. Cotton is conveyed through the rear of the central location into two separation chambers, one for each auger portion, and into the lower portions of two corresponding conveying ducts which extend upwardly and outwardly at bend locations located just above the rockshaft and below the cab floor. Each duct includes a nozzle directing air upwardly above the bend location so that cotton is sucked into the bend. The ducts extend upwardly at an angle to the vertical direction and include uppermost sections extending rearwardly over the input sections of the two cleaners. The uppermost sections are angled from the horizontal and distribute the cotton evenly over cleaner inlets.

Abstract: A method for reissuing a command initiated by a master device to a slave device, where the slave device fails to process the command within a predetermined interval. The slave stores the command, including a master identifier used to identify the master device that initiated the command, at the slave device. The slave device arbitrates for control of the command bus when it becomes available to process the command. Upon receiving control of the bus, the slave device drives the stored command, including the master identifier, onto the command bus. It appears to the system that the master device reissued the command.

Abstract: A method and system for providing cache coherence despite unordered interconnect transport. In a computer system of multiple memory devices or memory units having shared memory and an interconnect characterized by unordered transport, the method comprises sending a request packet over the interconnect from a first memory device to a second memory device requiring that an action be carried out on shared memory held by the second memory device. If the second memory device determines that the shared memory is in a transient state, the second memory device returns the request packet to the first memory device; otherwise, the request is carried out by the second memory device. The first memory device will continue to resend the request packet each time that the request packet is returned.