Abstract: In some examples, an integrated circuit comprises a substrate; a first metal layer and a second metal layer positioned above the substrate; a first composite dielectric layer located on the first metal layer, wherein the first composite dielectric layer comprises a first anti-reflective coating; a second composite dielectric layer positioned on the second metal layer, wherein the second composite dielectric layer comprises a second anti-reflective coating; and a capacitor metal layer disposed over the first composite dielectric layer.

Abstract: In some examples, an integrated circuit comprises a substrate; a first metal layer and a second metal layer positioned above the substrate; a first composite dielectric layer located on the first metal layer, wherein the first composite dielectric layer comprises a first anti-reflective coating; a second composite dielectric layer positioned on the second metal layer, wherein the second composite dielectric layer comprises a second anti-reflective coating; and a capacitor metal layer disposed over the first composite dielectric layer.

Abstract: In some examples, an integrated circuit comprises a substrate; a first metal layer and a second metal layer positioned above the substrate; a first composite dielectric layer located on the first metal layer, wherein the first composite dielectric layer comprises a first anti-reflective coating; a second composite dielectric layer positioned on the second metal layer, wherein the second composite dielectric layer comprises a second anti-reflective coating; and a capacitor metal layer disposed over the first composite dielectric layer.

Abstract: An open-base semiconductor diode device has an emitter, base, and collector layers. The layers are configured and doped such that the device has an IV characteristic with: i. a punchthrough region beginning at a voltage Vpt with positive resistance, followed by, and ii. an avalanche region including a positive resistance stage beginning with conductivity modulation at Vcrit and Icrit and having a resistance Rcrit, iii. wherein the values of Vcrit, Icrit and Rcrit are set according to the layer configuration and doping. The device may have a double-base structure, and the width of a lower-doped base region may be minimised such that current density Jcrit at which the conductivity modulation occurs due to avalanche is increased. In one example, the device comprises a N-N+ or a P-P+ double-emitter. Thickness of N? or P? layers may be minimised such that the current-carrying capability is maximised and the doping of this layer does not affect the current-carrying capability of the device.

Abstract: A semiconductor overvoltage protection device in the form of a four layer diode has first and third layers of a first conductivity semiconductor material, second and fourth layers of a second conductivity type semiconductor material and a first buried region of the first conductivity type in the third layer adjacent to the junction between the second and third layers. The buried region has a greater impurity concentration than the third layer. The first layer is penetrated by a plurality of dots of the second layer extending through the first layer and the first buried region lies wholly beneath the second layer and is laterally offset from the dots and the first layer.

Abstract: A semiconductor device has a PN junction between first and second regions of the device in which in the intended operation of the device reverse breakdown of the junction occurs. The first region is of lower impurity concentration than the second region and a first buried region of the same conductivity type as and of higher impurity concentration than the first region is provided in the first region adjacent to the junction. A second buried region of the same conductivity type as and of higher impurity concentration than the first buried region is provided in the first buried region and one of the first and second buried regions is formed with a plurality of separate regions of small area arranged so that reverse breakdown of the junction preferentially occurs through the second buried region.

Abstract: A semiconductor device has a PN junction between first and second regions of the device in which in the intended operation of the device reverse breakdown of the junction occurs. The first region is of lower impurity concentration than the second region and a first buried region of the same conductivity type as and of higher impurity concentration than the first region is provided in the first region adjacent to the junction. A second buried region of the same conductivity type as and of higher impurity concentration than the first buried region is provided in the first buried region and one of the first and second buried regions is formed with a plurality of separate regions of small area arranged so that reverse breakdown of the junction preferentially occurs through the second buried region.

Abstract: A semiconductor overvoltage protection device in the form of a four layer diode has first and third layers of a first conductivity semiconductor material, second and fourth layers of a second conductivity type semiconductor material and a first buried region of the first conductivity type in the third layer adjacent to the junction between the second and third layers. The buried region has a greater impurity concentration than the third layer. The first layer is penetrated by a plurality of dots of the second layer extending through the first layer and the first buried region lies wholly beneath the second layer and is laterally offset from the dots and the first layer.

Abstract: A negative resistance device (NRD) has a MOSFET-like structure, and is biased by shorting the gate and source together at a fixed applied potential and applying a different fixed potential to the drain, and sweeping the bulk potential towards the drain potential, causing the bulk current to exhibit a negative resistance characteristic. The NRD may be used in a memory circuit (10) in which a resistor (R) is connected between the bulk (2) and a fixed potential. Two States of the circuit at which the current through the resistor matches that through the bulk of the NRD are stable, providing for bistable memory operation.

Abstract: A negative resistance device (NRD) has a MOSFET-like structure, and is biased by: