Abstract: A circuit renders computer graphics for an electronic display. The circuit includes a frame buffer to store a primitive for each pixel of the display, the primitive for each pixel being output to the display. The circuit includes a processor for storing the primitives in the frame buffer based on input primitives. The processor receives an input primitive in the same group as a corresponding stored primitive, determines whether the input primitive is within a threshold distance from the stored primitive, determines which of the input primitive and stored primitive is closer in depth to an observer of the display when the input primitive and the stored primitive are not within the threshold distance, and outputs the closer primitive to the frame buffer. The processor determines whether the input primitive and stored primitive has a higher priority when within the threshold distance and outputs the primitive with the higher priority.

Abstract: This invention relates generally to the field of computer graphics display, and more particularly to reducing the amount of time needed to render complex virtual scenes on a computer graphics display. This invention combines the advantages of the prior art methods of list priority and depth buffering (e.g. Z-buffering) with new simplified and enhanced full buffer processes. In one embodiment, a simplified full buffer arrangement enables the elimination of rendering primitives prior to pixel shading for regions of the screen which have previously been covered by closer primitives. Another embodiment provides for an enhanced full buffer that combines the coverage of a previously rendered primitive in a partial buffer and associates it with a current primitive to cover pixel arrays.