Abstract: A computation core includes a computation block, an addressing block and an instruction sequencer, which are coupled to a memory through a memory interface. The computation block includes a register file and dual execution units. The execution units include features for enhanced performance in executing digital signal computations. The computation core is configured for executing digital signal processor instructions and microcontroller instructions, while achieving efficient digital signal processor computation and high code density. A finite impulse response filter algorithm achieves high performance on the dual execution units.

Abstract: System and method for monitoring a processor when it executes software code for a computer program. A register collects information regarding instructions executed by the processor, from the program counter; and a sampler, operatively connected to the register, asynchronously from the operation of the processor, samples contents of the register. The sampler may provide the samples to a host computer via a shift register in a JTAG port, and the host computer may provide a statistical record of the instructions executed by the processor.

Abstract: System and method for monitoring a processor when it executes software code for a computer program. A register collects information regarding instructions executed by the processor, from the program counter; and a sampler, operatively connected to the register, asynchronously from the operation of the processor, samples contents of the register. The sampler may provide the samples to a host computer via a shift register in a JTAG port, and the host computer may provide a statistical record of the instructions executed by the processor.

Abstract: An emulation system used to debug software for a digital signal processor (DSP) includes a built-in digital signal analyzer which operates upon the same digital signals as those presented directly to and outputted by the DSP, bypassing the signal converters used to convert an input analog signal to digital format and the output digital signal to analog format. A host computer communicates with the digital signal analyzer via firmware in a control processor and personality board, or is alternately connected directly with the analyzer. Communications between the digital signal analyzer and the DSP are through the same contact probe as that used for the emulation software. The analyzer may be used to trigger a software function within the emulator based upon the real-time signal from the DSP, and is also capable of interpolating between successive digital values of an analyzed signal for display purposes.