Patents by Inventor Russell Lee Lewis
Russell Lee Lewis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8612722Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.Type: GrantFiled: March 8, 2012Date of Patent: December 17, 2013Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Patent number: 8341639Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.Type: GrantFiled: September 29, 2010Date of Patent: December 25, 2012Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Publication number: 20120166743Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.Type: ApplicationFiled: March 8, 2012Publication date: June 28, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Patent number: 8171257Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.Type: GrantFiled: September 25, 2009Date of Patent: May 1, 2012Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Patent number: 8117616Abstract: A deadlock prevention mode indicator is provided, wherein the deadlock prevention mode indicator is a lock that can be held in a shared mode or in an exclusive mode by one or more of a plurality of threads, and wherein the plurality of threads can cause deadlocks while acquiring a plurality of data locks. An execution of the plurality of threads is serialized by allowing a data lock to be acquired by a thread in response to the thread holding the deadlock prevention mode indicator, wherein serializing the plurality of threads avoids any deadlock from occurring.Type: GrantFiled: January 9, 2007Date of Patent: February 14, 2012Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Patent number: 8024739Abstract: Provided are a method, system, and article of manufacture, wherein an execution unit requests additional execution time from a kernel to prevent the execution unit from being swapped out during an execution of a critical section. The kernel determines whether the execution unit has previously avoided yielding execution to other execution units within a predetermined period of time after being allocated the additional execution time in response to at least one previous request for the additional execution time. The kernel allocates the additional execution time to the execution unit, in response to determining that the execution unit has not previously avoided yielding execution to the other execution units within the predetermined period of time after being allocated the additional execution time in response to the at least one previous request for the additional execution time.Type: GrantFiled: January 9, 2007Date of Patent: September 20, 2011Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Publication number: 20110078407Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.Type: ApplicationFiled: September 25, 2009Publication date: March 31, 2011Inventor: Russell Lee Lewis
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Publication number: 20110023043Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.Type: ApplicationFiled: September 29, 2010Publication date: January 27, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Patent number: 7853950Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.Type: GrantFiled: April 5, 2007Date of Patent: December 14, 2010Assignee: International Business Machines CorporarionInventor: Russell Lee Lewis
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Patent number: 7822948Abstract: An apparatus, system, and method are disclosed for discontiguous multiple issue of instructions. An assignment unit assigns a plurality of instruction blocks to a plurality of issue units. The plurality of issue units each comprises a renaming map that maps each architecturally visible register address to a rename register. Each issue unit maps each architecturally visible register in the decoded instruction to a register placeholder if the renaming map entry for that architecturally visible register is invalid else maps the architecturally visible register in the decoded instruction to a rename register if the rename register entry is valid. Each issue unit further receives predecessor mapping information from the renaming map of the issue unit's predecessor issue unit in response to the assignment unit identifying a relationship with the predecessor issue unit and the final mapping information being available from the predecessor issue unit.Type: GrantFiled: January 3, 2008Date of Patent: October 26, 2010Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Patent number: 7685366Abstract: Provided are a system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.Type: GrantFiled: April 29, 2008Date of Patent: March 23, 2010Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Publication number: 20090210623Abstract: Provided are a system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.Type: ApplicationFiled: April 29, 2008Publication date: August 20, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Publication number: 20090177868Abstract: An apparatus, system, and method are disclosed for discontiguous multiple issue of instructions. An assignment unit assigns a plurality of instruction blocks to a plurality of issue units. The plurality of issue units each comprises a renaming map that maps each architecturally visible register address to a rename register. Each issue unit maps each architecturally visible register in the decoded instruction to a register placeholder if the renaming map entry for that architecturally visible register is invalid else maps the architecturally visible register in the decoded instruction to a rename register if the rename register entry is valid. Each issue unit further receives predecessor mapping information from the renaming map of the issue unit's predecessor issue unit in response to the assignment unit identifying a relationship with the predecessor issue unit and the final mapping information being available from the predecessor issue unit.Type: ApplicationFiled: January 3, 2008Publication date: July 9, 2009Inventor: Russell Lee Lewis
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Patent number: 7543126Abstract: The apparatus, system and method implement subcontexts which associate groups of memory blocks. The apparatus, system and method maintain a permissions mapping for inter-subcontext memory accesses. A control module monitors all inter-subcontext memory accesses and prevents those accesses for which a permissions mapping does not exist.Type: GrantFiled: August 31, 2005Date of Patent: June 2, 2009Assignee: International Business Machines CorporationInventor: Russell Lee Lewis
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Publication number: 20080250422Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.Type: ApplicationFiled: April 5, 2007Publication date: October 9, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Publication number: 20080168448Abstract: A deadlock prevention mode indicator is provided, wherein the deadlock prevention mode indicator is a lock that can be held in a shared mode or in an exclusive mode by one or more of a plurality of threads, and wherein the plurality of threads can cause deadlocks while acquiring a plurality of data locks. An execution of the plurality of threads is serialized by allowing a data lock to be acquired by a thread in response to the thread holding the deadlock prevention mode indicator, wherein serializing the plurality of threads avoids any deadlock from occurring.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Publication number: 20080168447Abstract: Provided are a method, system, and article of manufacture, wherein an execution unit requests additional execution time from a kernel to prevent the execution unit from being swapped out during an execution of a critical section. The kernel determines whether the execution unit has previously avoided yielding execution to other execution units within a predetermined period of time after being allocated the additional execution time in response to at least one previous request for the additional execution time. The kernel allocates the additional execution time to the execution unit, in response to determining that the execution unit has not previously avoided yielding execution to the other execution units within the predetermined period of time after being allocated the additional execution time in response to the at least one previous request for the additional execution time.Type: ApplicationFiled: January 9, 2007Publication date: July 10, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventor: Russell Lee Lewis
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Patent number: 7383388Abstract: Provided are a method, system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.Type: GrantFiled: June 17, 2004Date of Patent: June 3, 2008Assignee: International Business Machines CorporationInventor: Russell Lee Lewis