Patents by Inventor Russell Lee Lewis

Russell Lee Lewis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8612722
    Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: December 17, 2013
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Patent number: 8341639
    Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: December 25, 2012
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Publication number: 20120166743
    Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.
    Type: Application
    Filed: March 8, 2012
    Publication date: June 28, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Patent number: 8171257
    Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: May 1, 2012
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Patent number: 8117616
    Abstract: A deadlock prevention mode indicator is provided, wherein the deadlock prevention mode indicator is a lock that can be held in a shared mode or in an exclusive mode by one or more of a plurality of threads, and wherein the plurality of threads can cause deadlocks while acquiring a plurality of data locks. An execution of the plurality of threads is serialized by allowing a data lock to be acquired by a thread in response to the thread holding the deadlock prevention mode indicator, wherein serializing the plurality of threads avoids any deadlock from occurring.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: February 14, 2012
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Patent number: 8024739
    Abstract: Provided are a method, system, and article of manufacture, wherein an execution unit requests additional execution time from a kernel to prevent the execution unit from being swapped out during an execution of a critical section. The kernel determines whether the execution unit has previously avoided yielding execution to other execution units within a predetermined period of time after being allocated the additional execution time in response to at least one previous request for the additional execution time. The kernel allocates the additional execution time to the execution unit, in response to determining that the execution unit has not previously avoided yielding execution to the other execution units within the predetermined period of time after being allocated the additional execution time in response to the at least one previous request for the additional execution time.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: September 20, 2011
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Publication number: 20110078407
    Abstract: Provided are a method, computer program product and system for determining an end of valid log in a log of write records. Records are written to a log in a storage device in a sequential order, wherein the records include a next pointer addressing a next record in a write order and a far ahead pointer addressing a far ahead record in the write order following the record. The far ahead pointer and the next pointer in a plurality of records are used to determine an end of valid log from which to start writing further records.
    Type: Application
    Filed: September 25, 2009
    Publication date: March 31, 2011
    Inventor: Russell Lee Lewis
  • Publication number: 20110023043
    Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.
    Type: Application
    Filed: September 29, 2010
    Publication date: January 27, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Patent number: 7853950
    Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.
    Type: Grant
    Filed: April 5, 2007
    Date of Patent: December 14, 2010
    Assignee: International Business Machines Corporarion
    Inventor: Russell Lee Lewis
  • Patent number: 7822948
    Abstract: An apparatus, system, and method are disclosed for discontiguous multiple issue of instructions. An assignment unit assigns a plurality of instruction blocks to a plurality of issue units. The plurality of issue units each comprises a renaming map that maps each architecturally visible register address to a rename register. Each issue unit maps each architecturally visible register in the decoded instruction to a register placeholder if the renaming map entry for that architecturally visible register is invalid else maps the architecturally visible register in the decoded instruction to a rename register if the rename register entry is valid. Each issue unit further receives predecessor mapping information from the renaming map of the issue unit's predecessor issue unit in response to the assignment unit identifying a relationship with the predecessor issue unit and the final mapping information being available from the predecessor issue unit.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Patent number: 7685366
    Abstract: Provided are a system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: March 23, 2010
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Publication number: 20090210623
    Abstract: Provided are a system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.
    Type: Application
    Filed: April 29, 2008
    Publication date: August 20, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Publication number: 20090177868
    Abstract: An apparatus, system, and method are disclosed for discontiguous multiple issue of instructions. An assignment unit assigns a plurality of instruction blocks to a plurality of issue units. The plurality of issue units each comprises a renaming map that maps each architecturally visible register address to a rename register. Each issue unit maps each architecturally visible register in the decoded instruction to a register placeholder if the renaming map entry for that architecturally visible register is invalid else maps the architecturally visible register in the decoded instruction to a rename register if the rename register entry is valid. Each issue unit further receives predecessor mapping information from the renaming map of the issue unit's predecessor issue unit in response to the assignment unit identifying a relationship with the predecessor issue unit and the final mapping information being available from the predecessor issue unit.
    Type: Application
    Filed: January 3, 2008
    Publication date: July 9, 2009
    Inventor: Russell Lee Lewis
  • Patent number: 7543126
    Abstract: The apparatus, system and method implement subcontexts which associate groups of memory blocks. The apparatus, system and method maintain a permissions mapping for inter-subcontext memory accesses. A control module monitors all inter-subcontext memory accesses and prevents those accesses for which a permissions mapping does not exist.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: June 2, 2009
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis
  • Publication number: 20080250422
    Abstract: Provided are a method, system, and program for executing multiple threads in a processor. Credits are set for a plurality of threads executed by the processor. The processor alternates among executing the threads having available credit. The processor decrements the credit for one of the threads in response to executing the thread and initiates an operation to reassign credits to the threads in response to depleting all the thread credits.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 9, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Publication number: 20080168448
    Abstract: A deadlock prevention mode indicator is provided, wherein the deadlock prevention mode indicator is a lock that can be held in a shared mode or in an exclusive mode by one or more of a plurality of threads, and wherein the plurality of threads can cause deadlocks while acquiring a plurality of data locks. An execution of the plurality of threads is serialized by allowing a data lock to be acquired by a thread in response to the thread holding the deadlock prevention mode indicator, wherein serializing the plurality of threads avoids any deadlock from occurring.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 10, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Publication number: 20080168447
    Abstract: Provided are a method, system, and article of manufacture, wherein an execution unit requests additional execution time from a kernel to prevent the execution unit from being swapped out during an execution of a critical section. The kernel determines whether the execution unit has previously avoided yielding execution to other execution units within a predetermined period of time after being allocated the additional execution time in response to at least one previous request for the additional execution time. The kernel allocates the additional execution time to the execution unit, in response to determining that the execution unit has not previously avoided yielding execution to the other execution units within the predetermined period of time after being allocated the additional execution time in response to the at least one previous request for the additional execution time.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 10, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Russell Lee Lewis
  • Patent number: 7383388
    Abstract: Provided are a method, system, and article of manufacture, wherein a first storage unit is coupled to a second storage unit. The first storage unit and the second storage unit are detected. A determination is made that the first storage unit is capable of responding to a write operation faster than the second storage unit, and that the second storage unit is capable of responding to a read operation at least as fast as the first storage unit. Data is written to the first storage unit. A transfer of the data is initiated from the first storage unit to the second storage unit. The data is read from the second storage unit, in response to a read request directed at both the first and the second storage units.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: June 3, 2008
    Assignee: International Business Machines Corporation
    Inventor: Russell Lee Lewis