Patents by Inventor Russell Low
Russell Low has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9400667Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.Type: GrantFiled: December 20, 2013Date of Patent: July 26, 2016Assignee: International Business Machines CorporationInventors: Curtis E. Hrischuk, Andrew Russell Low, Peter Duncan Shipton, John Joseph Stecher
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Patent number: 8881149Abstract: A method for providing control of Java resource runtime usage may include establishing communication with one or more Java virtual machines (JVMs) forming a hive via a hive communication channel where the hive comprises a plurality of JVMs configured to enable utilization of at least one shared resource, receiving, via the hive communication channel, environmental information indicative of hive activity relative to the at least one shared resource from at least one of the one or more JVMs, and adapting, via processing circuitry, operations associated with use of the at least one shared resource based on the environmental information.Type: GrantFiled: April 11, 2012Date of Patent: November 4, 2014Assignee: International Business Machines CorporationInventors: Michael Hilton Dawson, Andrew Russell Low, Prashanth Kattige Nageshappa, Balbir Singh
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Patent number: 8881151Abstract: A method for providing control of Java resource runtime usage may include establishing communication with one or more Java virtual machines (JVMs) forming a hive via a hive communication channel where the hive comprises a plurality of JVMs configured to enable utilization of at least one shared resource, receiving, via the hive communication channel, environmental information indicative of hive activity relative to the at least one shared resource from at least one of the one or more JVMs, and adapting, via processing circuitry, operations associated with use of the at least one shared resource based on the environmental information.Type: GrantFiled: May 9, 2013Date of Patent: November 4, 2014Assignee: International Business Machines CorporationInventors: Michael Hilton Dawson, Andrew Russell Low, Prashanth Kattige Nageshappa, Balbir Singh
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Patent number: 8839215Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.Type: GrantFiled: July 19, 2010Date of Patent: September 16, 2014Assignee: International Business Machines CorporationInventors: Curtis E. Hrischuk, Andrew Russell Low, Peter Duncan Shipton, John Joseph Stecher
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Publication number: 20140115585Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.Type: ApplicationFiled: December 20, 2013Publication date: April 24, 2014Applicant: IBM CORPORATIONInventors: Curtis E. HRISCHUK, Andrew Russell LOW, Peter Duncan SHIPTON, John Joseph STECHER
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Patent number: 8627303Abstract: A method, computer program product, and system for memory optimization by partitioning extraneous information from executable virtual machine code or interpreted code. The extraneous information may be stored separately, or accessed from the original code if needed for debugging or servicing the code in the field. This approach optimizes memory usage by reducing memory footprint while maintaining accessibility of the non-executable information for debugging and other processes necessary for servicing code in the field.Type: GrantFiled: November 30, 2009Date of Patent: January 7, 2014Assignee: International Business Machines CorporationInventors: Henry Walton Adams, III, Sean Christopher Foley, Curtis E. Hrischuk, Andrew Russell Low, Peter Duncan Shipton
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Publication number: 20130275976Abstract: A method for providing control of Java resource runtime usage may include establishing communication with one or more Java virtual machines (JVMs) forming a hive via a hive communication channel where the hive comprises a plurality of JVMs configured to enable utilization of at least one shared resource, receiving, via the hive communication channel, environmental information indicative of hive activity relative to the at least one shared resource from at least one of the one or more JVMs, and adapting, via processing circuitry, operations associated with use of the at least one shared resource based on the environmental information.Type: ApplicationFiled: May 9, 2013Publication date: October 17, 2013Inventors: Michael Hilton DAWSON, Andrew Russell Low, Prashanth Kattige Nageshappa, Balbir Singh
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Publication number: 20120244692Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.Type: ApplicationFiled: June 5, 2012Publication date: September 27, 2012Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
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Publication number: 20120183199Abstract: A method of identifying individual silicon substrates, and particularly solar cells, is disclosed. Every solar cell possesses a unique set of optical properties. The method identifies these properties and stores them in a database, where they can be associated to a particular solar cell. Unlike conventional tracking techniques, the present method requires no dedicated space on the surface of the silicon substrate. This method allows substrates to be tracked through the manufacturing process, as well as throughout the life of the substrate.Type: ApplicationFiled: January 14, 2011Publication date: July 19, 2012Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Benjamin Riordon, Russell Low
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Patent number: 8216923Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.Type: GrantFiled: October 1, 2010Date of Patent: July 10, 2012Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
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Publication number: 20120083102Abstract: An improved, lower cost method of processing substrates, such as to create solar cells is disclosed. In addition, a modified substrate carrier is disclosed. The carriers typically used to carry the substrates are modified so as to serve as shadow masks for a patterned implant. In some embodiments, various patterns can be created using the carriers such that different process steps can be performed on the substrate by changing the carrier or the position with the carrier. In addition, since the alignment of the substrate to the carrier is critical, the carrier may contain alignment features to insure that the substrate is positioned properly on the carrier. In some embodiments, gravity is used to hold the substrate on the carrier, and therefore, the ions are directed so that the ion beam travels upward toward the bottom side of the carrier.Type: ApplicationFiled: October 1, 2010Publication date: April 5, 2012Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Nicholas Bateman, Kevin Daniels, Atul Gupta, Russell Low, Benjamin Riordon, Robert Mitchell, Steven Anella
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Patent number: 8143604Abstract: An ion implantation system includes an ion source configured to provide an ion beam, a terminal structure defining a cavity, the ion source at least partially disposed within the cavity, and an insulator system. The insulator system is configured to electrically insulate the terminal structure and is configured to provide an effective dielectric strength greater than about 72 kilovolts (kV)/inch in a region proximate at least one exterior surface of the terminal structure. A gas box insulator system to electrically insulate a gas box of the ion implantation system is also provided.Type: GrantFiled: March 31, 2006Date of Patent: March 27, 2012Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Russell Low, Piortr R. Lubicki, D. Jeffrey Lischer, Steve Krause, Eric Hermanson, Joseph C. Olson
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Publication number: 20120017204Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.Type: ApplicationFiled: July 19, 2010Publication date: January 19, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Curtis E. Hrischuk, Andrew Russell Low, Peter Duncan Shipton, John Joseph Stecher
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Patent number: 8084293Abstract: An improved, lower cost method of processing substrates, such as to create solar cells, is disclosed. The doped regions are created on the substrate, using a mask or without the use of lithography or masks. After the implantation is complete, visual recognition is used to determine the exact region that was implanted. This information can then be used by subsequent process steps to crate a suitable metallization layer and provide alignment information. These techniques can also be used in other ion implanter applications. In another aspect, a dot pattern selective emitter is created and imaging is used to determine the appropriate metallization layer.Type: GrantFiled: April 6, 2010Date of Patent: December 27, 2011Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Benjamin Riordon, Russell Low, Atul Gupta, William Weaver
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Publication number: 20110244625Abstract: An improved, lower cost method of processing substrates, such as to create solar cells, is disclosed. The doped regions are created on the substrate, using a mask or without the use of lithography or masks. After the implantation is complete, visual recognition is used to determine the exact region that was implanted. This information can then be used by subsequent process steps to crate a suitable metallization layer and provide alignment information. These techniques can also be used in other ion implanter applications. In another aspect, a dot pattern selective emitter is created and imaging is used to determine the appropriate metallization layer.Type: ApplicationFiled: April 6, 2010Publication date: October 6, 2011Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Benjamin Riordon, Russell Low, Atul Gupta, William Weaver
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Publication number: 20110131561Abstract: A method, computer program product, and system for memory optimization by partitioning extraneous information from executable virtual machine code or interpreted code. The extraneous information may be stored separately, or accessed from the original code if needed for debugging or servicing the code in the field. This approach optimizes memory usage by reducing memory footprint while maintaining accessibility of the non-executable information for debugging and other processes necessary for servicing code in the field.Type: ApplicationFiled: November 30, 2009Publication date: June 2, 2011Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Henry Walton Adams, III, Sean Christopher Foley, Curtis E. Hrischuk, Andrew Russell Low, Peter Duncan Shipton
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Publication number: 20110124186Abstract: A plasma processing apparatus comprises a plasma source configured to produce a plasma in a plasma chamber, such that the plasma contains ions for implantation into a workpiece. The apparatus also includes a focusing plate arrangement having an aperture arrangement configured to modify a shape of a plasma sheath of the plasma proximate the focusing plate such that ions exiting an aperture of the aperture arrangement define focused ions. The apparatus further includes a processing chamber containing a workpiece spaced from the focusing plate such that a stationary implant region of the focused ions at the workpiece is substantially narrower that the aperture. The apparatus is configured to create a plurality of patterned areas in the workpiece by scanning the workpiece during ion implantation.Type: ApplicationFiled: November 16, 2010Publication date: May 26, 2011Applicant: VARIAN SEMICONDUCTOR EQUIPMENT ASSOCIATES, INC.Inventors: Anthony Renau, Ludovic Godet, Timothy J. Miller, Joseph C. Olson, Vikram Singh, James Buonodono, Frank Sinclair, Deepak A. Ramappa, Russell Low, Atul Gupta, Kevin M. Daniels
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Patent number: 7887034Abstract: A method and clamp system for use on an ion implanter system for aligning a cathode and filament relative to one another in-situ are disclosed. The invention includes a clamp system having a clamp including a first clamp member separably coupled to a second clamp member, and an opening to a mount portion of one of the cathode and the filament in at least one of the clamp members. Each clamp member includes a surface to engage a mount portion of one of the cathode and the filament. The opening is adapted to receive a positioning tool to position the cathode and the filament relative to one another by moving the mount portion when the clamp is released. The mount portion may include a tool receiving member to facilitate accurate positioning.Type: GrantFiled: August 1, 2005Date of Patent: February 15, 2011Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Stephen Krause, Eric R. Cobb, Russell Low
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Publication number: 20100184250Abstract: An improved method of doping substrates, such as a solar cell, is disclosed. Conductors, such as metal lines, are often deposited on the surface of a substrate. In some embodiments, the conductivity of the substrate beneath the conductors is different than the conductivity of other regions of the substrate. Therefore, the conductors can serve as the mask for a subsequent blanket doping, which changes the conductivity of the surface of the substrate, except beneath the conductors. In some embodiments, an initial blanket doping is performed prior to the deposition of the conductors to create an initial uniformly doped region.Type: ApplicationFiled: January 18, 2010Publication date: July 22, 2010Inventors: Julian Blake, Russell Low
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Patent number: 7576337Abstract: A power supply system for an ion implantation system. In one particular exemplary embodiment, the system may be realized as a power supply system that includes a low frequency power inverter, a stack driver and a high voltage power generation unit that receives source power from the power inverter. The high voltage generation unit may include a high voltage transformer for providing an output power that is multiplied to a desired output level and delivered to an input terminal of an ion beam accelerator. The power supply system may also include a dielectric enclosure that encases at least a portion of the high voltage power generation unit, thereby preventing variation in the break down strength of the internal components.Type: GrantFiled: January 5, 2007Date of Patent: August 18, 2009Assignee: Varian Semiconductor Equipment Associates, Inc.Inventors: Piotr Lubicki, Russell Low, Steve Krause, Eric Hermanson