Patents by Inventor Russell Mohn

Russell Mohn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11743702
    Abstract: An advertising method for a low-power Bluetooth® device includes driving a finite state machine to obtain a pre-generated or external microcontroller input advertising packet definition; reading in the finite state machine the advertising content and the advertising channel in the advertising packet definition; driving the finite state machine to play the advertising content in the advertising channel. Using the finite state machine, that is, being able to play the advertising content in the advertising packet definition eliminates the need for complicated software development work of the Bluetooth® chip, enabling the Bluetooth® chip to advertising without software development, thus reducing the development cost of the Bluetooth® system, promoting the further wider adoption of low-power Bluetooth® technology, and promoting the development of the Internet of Things.
    Type: Grant
    Filed: August 29, 2022
    Date of Patent: August 29, 2023
    Assignee: INPLAY, INC.
    Inventors: Qun Wu, Yongru Gu, Jun Tang, Russell Mohn
  • Publication number: 20220385248
    Abstract: A class-D RF power amplifier (PA) architecture with duty cycle control has improved power efficiency while suppressing even-order harmonics. An inductor and capacitor (LC) low pass filter (LPF) can also be integrated on-chip to further suppress harmonics and provide impedance transformation between the PA and load. This eases the design for customers and reduce their bill of materials cost. The LPF can also match the PA to the load impedance to improve efficiency. The harmonic levels can also be controlled by adjusting the duty cycle of the PA output.
    Type: Application
    Filed: May 26, 2021
    Publication date: December 1, 2022
    Inventors: Ruifeng LIU, Russell MOHN
  • Patent number: 11463049
    Abstract: A digitally modulated polar power amplifier uses a thin-oxide amplifying transistor with a protection diode. The polar power includes a driver amplifier in a driver stage that can receive a phase-modulated signal with a constant envelope and amplify the signal for the output stage, which includes only a single thin-oxide transistor, leading to improved efficiency over systems that require a thick-oxide transistor. A protection diode can be added between the output of the polar power amplifier and the supply voltage to limit the output to the sum of the supply voltage plus the forward voltage of the diode. Amplitude modulation can be achieved through dynamically turning on and off the digital power amplifier via an amplitude control word (acw) input signal.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: October 4, 2022
    Assignee: INPLAY, INC.
    Inventors: Ruifeng Liu, Russell Mohn
  • Patent number: 11309932
    Abstract: Semiconductor chips are made increasingly smaller, thanks to improved design techniques and process scaling. Sometimes the bottleneck is not the chip itself but the package size due to many necessary pins. To help reduce the number of package pins, the chip should use less pins by sharing or reusing pins if possible. Therefore, single-ended RF input/output is used for transceiver, and the same pin is shared between RX and TX. A receiver (RX)-transmitter (TX) impedance co-matching method uses multiple bondwires for transceivers sharing one input/output (I/O) pin between RX and TX. The RX input impedance and TX output impedance are transformed closer to each other or even to the same impedance, which makes it possible to get the best RX and TX performance with just one matching network. The chip area is also saved without using on-chip inductors.
    Type: Grant
    Filed: May 25, 2021
    Date of Patent: April 19, 2022
    Assignee: INPLAY, INC.
    Inventors: Ruifeng Liu, Russell Mohn
  • Patent number: 7414273
    Abstract: A two-dimensional silicon controlled rectifier (2DSCR) having the anode and cathode forming a checkerboard pattern. Such a pattern maximizes the anode to cathode contact length (the active area) within a given SCR area, i.e., effectively increasing the SCR width. Increasing the physical SCR area, increases the current handling capabilities of the SCR.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: August 19, 2008
    Assignees: Sarnoff Corporation, Sarnoff Europe
    Inventors: Russell Mohn, Cong-Son Trinh, Phillip Czeslaw Jozwiak, John Armer, Markus Paul Josef Mergens
  • Publication number: 20060011939
    Abstract: A two-dimensional silicon controlled rectifier (2DSCR) having the anode and cathode forming a checkerboard pattern. Such a pattern maximizes the anode to cathode contact length (the active area) within a given SCR area, i.e., effectively increasing the SCR width. Increasing the physical SCR area, increases the current handling capabilities of the SCR.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 19, 2006
    Inventors: Russell Mohn, Cong-Son Trinh, Phillip Jozwiak, John Armer, Markus Mergens
  • Patent number: 6909149
    Abstract: A silicon-on-insulator (SOI) electrostatic discharge (ESD) protection device that can protect very sensitive thin gate oxides by limiting the power dissipation during the ESD event, which is best achieved by reducing the voltage drop across the active (protection) device during an ESD event. In one embodiment, the invention provides very low triggering and holding voltages.
    Type: Grant
    Filed: April 15, 2004
    Date of Patent: June 21, 2005
    Assignees: Sarnoff Corporation, Sarnoff Europe BVBA
    Inventors: Cornelius Christian Russ, Phillip Czeslaw Jozwiak, Markus Paul Josef Mergens, John Armer, Cong-Son Trinh, Russell Mohn, Koen Gerard Maria Verhaege
  • Publication number: 20040207021
    Abstract: A silicon-on-insulator (SOI) electrostatic discharge (ESD) protection device that can protect very sensitive thin gate oxides by limiting the power dissipation during the ESD event, which is best achieved by reducing the voltage drop across the active (protection) device during an ESD event. In one embodiment, the invention provides very low triggering and holding voltages.
    Type: Application
    Filed: April 15, 2004
    Publication date: October 21, 2004
    Inventors: Cornelius Christian Russ, Phillip Czeslaw Jozwiak, Markus Paul Josef Mergens, John Armer, Cong-Son Trinh, Russell Mohn, Koen Gerard Maria Verhaege
  • Publication number: 20030227402
    Abstract: Method and apparatus for reducing systematic errors in a current steering digital-to-analog converter. The present invention is an efficient method of determining a switching order such that given a known distribution of mismatch errors, the cumulated error is minimized at each DAC code.
    Type: Application
    Filed: March 24, 2003
    Publication date: December 11, 2003
    Applicant: Sarnoff Corporation
    Inventors: Janusz Starzyk, Tom Senko, Russell Mohn