Patents by Inventor Russell S. Gantman

Russell S. Gantman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9692876
    Abstract: An approach is provided to receive notifications at a device. The approach senses whether an activity, such as movement of the device, has occurred within a time period prior to the current time with the activity being a result of a user action, such as movement or usage, on the device. In response to sensing that an activity has occurred within the time period, an alert is generated at the device to alert the user of the notification. On the other hand, in response to sensing that activity did not occur during the time period, the alert is not generated at the device.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: June 27, 2017
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Jason M. Grimme, Russell S. VanBlon, Russell S. Gantman
  • Publication number: 20160292994
    Abstract: An approach is provided to receive notifications at a device. The approach senses whether an activity, such as movement of the device, has occurred within a time period prior to the current time with the activity being a result of a user action, such as movement or usage, on the device. In response to sensing that an activity has occurred within the time period, an alert is generated at the device to alert the user of the notification. On the other hand, in response to sensing that activity did not occur during the time period, the alert is not generated at the device.
    Type: Application
    Filed: March 30, 2015
    Publication date: October 6, 2016
    Inventors: Jason M. Grimme, Russell S. VanBlon, Russell S. Gantman
  • Patent number: 5696988
    Abstract: A current/voltage configurable I/O module is provided for a programmable logic controller. The I/O module includes first and second D/A converters which are cascaded together such that a data stream provided to the first D/A converter flows through to the second D/A converter. Each of the D/A converters includes a respective current output, a voltage output and range/mode select inputs. A serial to parallel shift register is coupled between a microprocessor data output and the data input of the first D/A converter such that information from a data stream supplied by the microprocessor is passed in serial fashion to the first and second D/A converters. The shift register also includes parallel outputs, namely range/mode select outputs, to which range/mode select information from the data stream is provided.
    Type: Grant
    Filed: October 4, 1995
    Date of Patent: December 9, 1997
    Assignee: GE FANUC Automation North America, Inc.
    Inventors: Cory L. Dale, Russell S. Gantman, Kevin M. Hackenbruch