Patents by Inventor Russell T. Baca

Russell T. Baca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9912191
    Abstract: Maintenance of reliable and highly available electronic systems to perform servicing and preventive maintenance may need to be performed without interruption of operations. Removal of circuit cards from a chassis may render the connectors on a chassis vulnerable to inadvertent short circuiting of power sources by stray metallic objects. A configuration where the power is removed from a connector as the circuit card is being extracted eliminates his possibility. The control circuits for the power supply connections and the power supplies are themselves redundant so that they may be similarly serviced.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 6, 2018
    Assignee: VIOLIN SYSTEMS LLC
    Inventors: John R. Sisler, John C. Ottesen, Russell T. Baca, Jean-Phillipe Fricker
  • Publication number: 20140063752
    Abstract: Maintenance of reliable and highly available electronic systems to perform servicing and preventive maintenance may need to be performed without interruption of operations. Removal of circuit cards from a chassis may render the connectors on a chassis vulnerable to inadvertent short circuiting of power sources by stray metallic objects. A configuration where the power is removed from a connector as the circuit card is being extracted eliminates his possibility. The control circuits for the power supply connections and the power supplies are themselves redundant so that they may be similarly serviced.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 6, 2014
    Inventors: John R. Sisler, John C. Ottesen, Russell T. Baca, Jean-Phillipe Fricker
  • Patent number: 6260152
    Abstract: A synchronization circuit (30) includes three flip-flops responsive to a common clock signal (CLK2). The input to the first flip-flop (32) represents the least significant bit (LSB) of a counter (31) included within a first clock domain. The CLK2 signal originates from a second clock domain. The output of the first flip-flop is provided as input to the second flip-flop (34), and the second flip-flop output is provided as input to the third flip-flop (36). An exclusive-or (XOR) gate (38) generates a synchronization signal in response to outputs of the second and third flip-flops (34-36). The synchronization signal is usable within the second clock domain and activate for one period of CLK2 subsequent to every transition occurring on the LSB input. The active state of the synchronization signal indicates that a predefined set of data inputs is stable and valid. In this manner, a single unsynchronized input signal, i.e., the LSB input, can be used to synchronize the data inputs.
    Type: Grant
    Filed: July 30, 1998
    Date of Patent: July 10, 2001
    Assignee: Siemens Information and Communication Networks, Inc.
    Inventors: Steven R. Cole, Russell T. Baca