Abstract: An optical superposition network that utilizes a time division multiplexing (TDM) protocol includes a first optical transmitter, a second optical transmitter and a receiver. The first optical transmitter transmits information in a tertiary mode during a time slot. The second optical transmitter transmits information in a tertiary mode during a different time slot. The information transmitted across the optical superposition network has an approximately constant average intensity such that the receiver can utilize a single decision threshold for the information received from the first and second optical transmitters.

Abstract: A central digital signal radio processor (DRSP) is separated from all analog inputs and outputs by digital data links. Each end of a data link couples to an interface which has transmit and receive capability using cancellation techniques to allow full duplex transmission. An antenna module located at the antenna processes much of tuning functions in analog and then converts the signal to digital and sends it to the DRSP for further processing. Transmitted digital signal from the DRSP are converted to analog by the antenna module and sent to the antenna. Microphones, tape and CD players and other inputs are similarly linked to the DRSP. The DRSP digital audio output is sent to speaker modules which convert to analog signals for driving speakers.

Abstract: A low cost, high speed multimedia data network is disclosed. The network preferably includes a fiber optic data bus arranged in a star topology configuration. Various types of devices or nodes may be placed in communication with the bus via a specially designed interface. The interface allows a device to communicate with the high speed network without requiring that the device have the processing power to receive and transmit data according to the protocols and demands of the network. The interface may be configured to match the complexity of its associated device. For intelligent devices, the interface may allow some of the network-related functions to be performed by the device itself. For non-intelligent (or "dumb") devices, the interface performs substantially all of the network-related functions.

Abstract: A memory efficient channel decoder circuit is provided for channel decoding differentially modulated data samples comprising multiple adjacent carriers each including two data samples associated therewith. The decoder circuit includes a pair of working read/write memory circuits partitioned into even and odd memory blocks, a separate read/write memory circuit connected thereto, and a complexmultiplier circuit having a first input connected to the working memory circuits, and a second input coupled to the separate read/write memory and a read only memory containing predefined calculation values. An in-place decimation-in-time FFT algorithm is used to differentially demodulate and frequency descramble (de-interleave) the data samples of each data symbol, as well as providing for automatic frequency control correction of the data samples.

Abstract: A memory efficient time de-interleave, de-puncture and viterbi decoder circuit is provided for decoding frames of digital data that is time interleaved over a plurality of data frames, wherein the time interleaved digital data includes convolutionally encoded data. The circuit includes a time de-interleave block having an input receiving a stream of the digital data and an output connected to an input of a de-puncture block, which has an output connected to an input of a viterbi decoder block. The time de-interleave block is adapted for communication with an external memory wherein the time de-interleave block establishes a plurality of address pointers thereto corresponding to the plurality of time interleaved data frames. In accordance with the address pointers, the time de-interleave circuit stores the viterbi metric data for a number of data frames within the external memory in a storage efficient manner.