Abstract: A system and method of generating and comparing a fingerprint for an integrated circuit is provided. A sensor module captures electromagnetic emissions from the integrated circuit. A feature extraction module extracts discriminating features from the captured electromagnetic emissions. A classifier training module generates a plurality of authentication fingerprints of the integrated circuit from the extracted discriminating features creating a reference fingerprint template for the integrated circuit. The reference template for the integrated circuit is stored in a database. For authentication, the reference fingerprint template from the database is compared to the generated authentication fingerprint.

Abstract: A method of emulation-based page granularity code signing comprising the steps of: copying guest operating system instructions and associated hash message authentication codes and/or digital signatures of each guest operating instruction from an untrusted guest operating system memory into a trusted host operating system memory; recomputing the hash message authentication codes using a secret key in the trusted host operating system memory; maintaining the secret key in the trusted host operating system memory and inaccessible by the untrusted guest operating system instructions; translating each guest operating system instruction that has a valid hash message authentication code to a set of host operating system instructions; executing the decrypted guest operating system instructions in the trusted host operating system; and modifying the guest operating system memory and registers when the set of translated host operating instructions executes in the trusted host operating system, such that it appears as i

Abstract: A Field Programmable Gate Array (FPGA) circuit capable of operating through at least one fault. The FPGA circuit includes a configuration memory and an embedded microprocessor. The embedded microprocessor having access to the configuration memory, static modules, at least one relocatable module, and at least one spare module. The relocatable module being relocatable from a first target area to a second target area. The relocatable module being relocatable by manipulating a partial bitstream with the embedded microprocessor. The microprocessor calculating a plurality of bitstream changes, to relocate the at least one relocatable module using at least triple modular redundancy (TMR).