Abstract: Imaging systems and associated methods are described. According to one aspect, an imaging system includes a printed circuit board, an interface configured to at least one of output and receive a plurality of electrical signals with respect to circuitry external of the printed circuit board, a plurality of antennas configured to at least one of transmit and receive electromagnetic energy with respect to a target imaging volume, a plurality of conductors configured to communicate the electrical signals between the interface and the antennas, switching circuitry configured to selectively couple the interface with different ones of the antennas and different ones of the conductors at a plurality of different moments in time, and a controller configured to control the switching circuitry to couple the different ones of the antennas with the interface to provide a plurality of different sampling points within an aperture of the imaging system.

Abstract: A method and system for protecting a device against return oriented programming attacks by encrypting a central processing unit (CPU) program counter value when storing that value in a software accessible memory and decrypting that value when loading it back into the program counter; whereby alterations to the value will prevent proper decryption and interoperation with the CPU.

Abstract: A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.

Abstract: A system and method of processing an encrypted instruction stream in hardware is disclosed. Main memory stores the encrypted instruction stream and unencrypted data. A central processing unit (CPU) is operatively coupled to the main memory. A decryptor is operatively coupled to the main memory and located within the CPU. The decryptor decrypts the encrypted instruction stream upon receipt of an instruction fetch signal from a CPU core. Unencrypted data is passed through to the CPU core without decryption upon receipt of a data fetch signal.