Abstract: In some examples, a system partitions a shared memory address space of a shared memory among a plurality of processing entities into a plurality of memory partitions, where a respective memory partition is associated with a respective processing entity. A first processing entity forwards, to a second processing entity, a first data operation, based on a determination by the first processing entity that the first data operation is to be applied to data for a memory partition associated with the second processing entity. The second processing entity applies the first data operation that includes writing data of the first data operation to the memory partition associated with the second processing entity using a non-atomic operation.

Abstract: In some examples, a system includes a processing entity and a memory to store data arranged in a plurality of bins associated with respective key values of a key. The system includes a cache to store cached data elements for respective accumulators that are updatable to represent occurrences of the respective key values of the key, where each accumulator corresponds to a different bin of the plurality of bins, and each cached data element has a range that is less than a range of a corresponding bin of the plurality of bins. Responsive to a value of a given cached data element as updated by a given accumulator satisfying a criterion, the processing entity is to cause an aggregation of the value of the given cached data element with a bin value in a respective bin.

Abstract: In some examples, a system includes a processing entity and a memory to store data arranged in a plurality of bins associated with respective key values of a key. The system includes a cache to store cached data elements for respective accumulators that are updatable to represent occurrences of the respective key values of the key, where each accumulator corresponds to a different bin of the plurality of bins, and each cached data element has a range that is less than a range of a corresponding bin of the plurality of bins. Responsive to a value of a given cached data element as updated by a given accumulator satisfying a criterion, the processing entity is to cause an aggregation of the value of the given cached data element with a bin value in a respective bin.

Abstract: In some examples, a system partitions a shared memory address space of a shared memory among a plurality of processing entities into a plurality of memory partitions, where a respective memory partition is associated with a respective processing entity. A first processing entity forwards, to a second processing entity, a first data operation, based on a determination by the first processing entity that the first data operation is to be applied to data for a memory partition associated with the second processing entity. The second processing entity applies the first data operation that includes writing data of the first data operation to the memory partition associated with the second processing entity using a non-atomic operation.

Abstract: Systems and methods are provided for accurately simulating memory operations of a multi-compute-engine system, such as a multi-core system. Simulation speed can be increased by consolidation location and state information associated with data stored in one or more caches of a simulated cache hierarchy. This consolidation of information can be reflected in a single cache line map or flat cache. Accordingly, searches for data (and copies of the data) in each and every cache of the simulated cache hierarchy can be performed fast and with greater efficiency than conventional simulation systems that operate using sequential, cache-by-cache searching, while maintaining data coherency.

Abstract: Systems and methods are provided for accurately simulating a hardware computing system. Application programming interfaces (APIs) are called within process code, the process being executed in simulation of the hardware computing system to start, stop, pause, and/or end tracking of one or more hardware events correlated to data about which a user wishes to receive statistics. Defining APIs within the process code allows per-process and per-instruction level granularity in the statistics.

Abstract: Systems and methods are provided for accurately simulating memory operations of a multi-compute-engine system, such as a multi-core system. Simulation speed can be increased by consolidation location and state information associated with data stored in one or more caches of a simulated cache hierarchy. This consolidation of information can be reflected in a single cache line map or flat cache. Accordingly, searches for data (and copies of the data) in each and every cache of the simulated cache hierarchy can be performed fast and with greater efficiency than conventional simulation systems that operate using sequential, cache-by-cache searching, while maintaining data coherency.