Abstract: A locked-axle spring compression system and method configured to raise a rail vehicle wheel off a rail and transport the raised wheel along a rail is presented. In one embodiment, the present disclosure discloses a system that can raise the locked-axle rail wheel off the rail and allowing the locked-axle train to be transported off the main line. One or more coil springs can be disposed between the truck frame and the journal box to distribute the weight of the train and forces acting thereon. The present disclosure provides a technological solution missing from conventional systems by at least providing a platform for an actuator configured to exert a force on one or more train elements to compress the coil springs and allow the locked-axle wheel to be raised off a surface (e.g., railroad track rail), by overcoming the coil spring pressure to raise the wheel off the rail.

Abstract: A locked-axle spring compression system and method configured to raise a rail vehicle wheel off a rail and transport the raised wheel along a rail is presented. In one embodiment, the present disclosure discloses a system that can raise the locked-axle rail wheel off the rail and allowing the locked-axle train to be transported off the main line. One or more coil springs can be disposed between the truck frame and the journal box to distribute the weight of the train and forces acting thereon. The present disclosure provides a technological solution missing from conventional systems by at least providing a platform for an actuator configured to exert a force on one or more train elements to compress the coil springs and allow the locked-axle wheel to be raised off a surface (e.g., railroad track rail), by overcoming the coil spring pressure to raise the wheel off the rail.

Abstract: A crane-less locked axle cradle system configured to lift a rail vehicle wheel off a rail and transport the lifted wheel along a rail is presented. The present disclosure discloses a system that can lift the locked-axle wheel off the rail with no crane thereby allowing the train with a locked axle to be transported off the mainline in a shorter period of time. A cradle system can have two parts (male and female members with wedges and rail wheels) that can be mated with each other around a rail wheel. As the male and female members are pulled together, locked wheel engagers can couple with different portions of the locked-axle wheel, causing the locked-axle wheel to lift off the rail given the gradient of the wedge or rotation of the wheel. In another embodiment, the wheel lifting can be assisted by an air bag, hydraulic cylinder, jack, or other.

Abstract: Methods, apparatuses, and systems related to depositing a storage node material are described. An example method includes forming a semiconductor structure including a support structure having a first silicate material over a bottom nitride material, a first nitride material over the first silicate material, a second silicate material over the first nitride material, and a second nitride material over the second silicate material. The method further includes removing portions of the second nitride material. The method further includes depositing a third silicate material over the second nitride material and a portion of the second silicate material. The method further includes forming an opening through the semiconductor structure. The method further includes depositing a storage node material within the opening.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The pillars are directly against conducting material of conductive lines in the conductive tiers. Other arrays, and methods, are disclosed.

Abstract: A method used in forming integrated circuitry comprises forming conductive material over a substrate. The conductive material is patterned into a conductive line that is horizontally longitudinally elongated. The conductive material is vertically recessed in longitudinally-spaced first regions of the conductive line to form longitudinally-spaced conductive pillars that individually are in individual longitudinally-spaced second regions that longitudinally-alternate with the longitudinally-spaced first regions along the conductive line. The conductive pillars project vertically relative to the conductive material in the longitudinally-spaced and vertically-recessed first regions of the conductive line. Electronic components are formed directly above the conductive pillars. Individual of the electronic components are directly electrically coupled to individual of the conductive pillars. Additional methods, including structure independent of method, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The pillars are directly against conducting material of conductive lines in the conductive tiers. Other arrays, and methods, are disclosed.

Abstract: A method used in forming integrated circuitry comprises forming conductive material over a substrate. The conductive material is patterned into a conductive line that is horizontally longitudinally elongated. The conductive material is vertically recessed in longitudinally-spaced first regions of the conductive line to form longitudinally-spaced conductive pillars that individually are in individual longitudinally-spaced second regions that longitudinally-alternate with the longitudinally-spaced first regions along the conductive line. The conductive pillars project vertically relative to the conductive material in the longitudinally-spaced and vertically-recessed first regions of the conductive line. Electronic components are formed directly above the conductive pillars. Individual of the electronic components are directly electrically coupled to individual of the conductive pillars. Additional methods, including structure independent of method, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The pillars are directly against conducting material of conductive lines in the conductive tiers. Other arrays, and methods, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. First dummy pillars in the memory blocks extend through at least a majority of the insulative tiers and the conductive tiers through which the channel-material strings extend. Second dummy pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The second dummy pillars extend through at least a majority of the insulative tiers and the conductive tiers through which the operative channel-material strings extend laterally-between the immediately-laterally-adjacent memory blocks. Other embodiments, including method, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. First dummy pillars in the memory blocks extend through at least a majority of the insulative tiers and the conductive tiers through which the channel-material strings extend. Second dummy pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The second dummy pillars extend through at least a majority of the insulative tiers and the conductive tiers through which the operative channel-material strings extend laterally-between the immediately-laterally-adjacent memory blocks. Other embodiments, including method, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. First dummy pillars in the memory blocks extend through at least a majority of the insulative tiers and the conductive tiers through which the channel-material strings extend. Second dummy pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The second dummy pillars extend through at least a majority of the insulative tiers and the conductive tiers through which the operative channel-material strings extend laterally-between the immediately-laterally-adjacent memory blocks. Other embodiments, including method, are disclosed.

Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. Insulative pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The pillars are directly against conducting material of conductive lines in the conductive tiers. Other arrays, and methods, are disclosed.