Abstract: System and methods are described for authenticating users across multiple environments within a cloud-computing environment. A system may receive an indication that a user authenticated within a first environment has performed an action specific to a second environment. The system determines whether a previous action was performed by the user specific to the second environment. In response to determining that no previous action was performed, the system retrieves a first token from an authentication database, wherein the first token is associated with authentication of the user within the first environment. The system then validates the first token, and then generates a second token associated with authentication of the user within the second environment.

Abstract: A status monitoring system includes a signal generation subsystem configured to receive a plurality of binary status signals from a plurality of monitored subcomponents and encode the plurality of binary status signals to generate a status signal indicative of the status of the plurality of monitored subcomponents. One or more processing subsystems are configured to receive the status signal and control a controlled subcomponent based, at least in part, upon the status signal.

Abstract: System and methods are described for authenticating users across multiple environments within a cloud-computing environment. A system may receive an indication that a user authenticated within a first environment has performed an action specific to a second environment. The system determines whether a previous action was performed by the user specific to the second environment. In response to determining that no previous action was performed, the system retrieves a first token from an authentication database, wherein the first token is associated with authentication of the user within the first environment. The system then validates the first token, and then generates a second token associated with authentication of the user within the second environment.

Abstract: A status monitoring system includes a signal generation subsystem configured to provide a status signal indicative of the status of one or more monitored subcomponents. A processing subsystem is associated with a controlled subcomponent and is configured to: assign a subcomponent policy to the controlled subcomponent, receive the status signal, compare the status signal to the subcomponent policy, and effectuate a procedure on the controlled subcomponent based, at least in part, upon the comparison of the status signal and the subcomponent policy.

Abstract: In various embodiments, options for data striping to FLASH memory are provided. In one embodiment, an apparatus is provided. The apparatus includes an SATA to ATA bridge, an ATA to USB bridge coupled to the SATA to ATA bridge, and a USB interface coupled to the ATA to USB bridge. The apparatus also includes a first FLASH memory controller coupled to the USB interface. The apparatus further includes a first FLASH memory module coupled to the first FLASH memory controller. The apparatus also includes a second FLASH memory controller coupled to the USB interface and a second FLASH memory module coupled to the second FLASH memory controller. A method for block striping data to or from a plurality of read or write channels.

Abstract: Portable USB memory modules or devices and methods for using such devices are disclosed herein. In one embodiment, a portable memory module can include a housing having a CompactFlash card form factor and one or more flash memory devices carried by the housing. The portable memory module can also include a USB controller carried by the housing and coupled to the one or more flash memory devices. The portable memory module can further include a connector including a first portion coupled to the controller and a second portion configured to mate with a host device. In several embodiments, the connector includes a plurality of pins to transfer signals to and from the memory module. The pins are configured to mate with a fifty pin socket on the host device.

Abstract: A system, method and apparatus is provided for stackable printed circuit boards. In one embodiment, the invention is an apparatus. The apparatus includes a FLASH memory module. The memory module includes a printed circuit (p.c.) board. The memory module also includes a first connector attached to the p.c. board. The memory module further includes a second connector attached to the p.c. board. The memory module also includes a FLASH memory coupled to the p.c. board. The FLASH memory is electrically coupled to the first connector. The FLASH memory is electrically isolated from the second connector. In an alternate embodiment, the invention is a method. The method includes receiving a signal for a first p.c. board. Furthermore, the method includes operating the first p.c. board based on the signal for the first p.c. board. Moreover, the method includes receiving a signal at the first p.c. board for a second p.c. board. Additionally, the method includes transferring the signal for the second p.c.

Abstract: A system, method and apparatus is provided for extended universal serial bus connectivity. In one embodiment, the invention is an apparatus. The apparatus includes a printed circuit board having a plurality or traces. The plurality of traces includes a first set of traces defining a universal serial bus. The first set of traces is routed between a connector site and an interface circuitry site. The plurality of traces also includes a second set of traces. The second set of traces defines extended signals of the universal serial bus. The second set of traces is routed between the connector site and the interface circuitry site.

Abstract: A system, method and apparatus is provided for configured printed circuit boards. In one embodiment, the invention is an apparatus. The apparatus includes a FLASH memory module. The FLASH memory module include a printed circuit (p.c.) board. The FLASH memory module also includes a FLASH memory subsystem coupled to the p.c. board. The FLASH memory module further includes a connector attached to the p.c. board. The connector has a configuration corresponding to a voltage specification for the FLASH memory module. The connector is coupled through the p.c. board to the FLASH memory subsystem.