Patents by Inventor RYAN P. MAYO

RYAN P. MAYO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10127952
    Abstract: A power control module comprising low voltage (LV) port for receiving low supply voltage via LV supply line, high voltage (HV) input port for receiving high supply voltage via HV supply line, wherein high supply voltage is higher than low supply voltage, LV output port for providing low output voltage, HV output port for providing high output voltage, LV node coupled to LV input port, HV node coupled to HV input port, bypass circuit coupled between LV and HV nodes, LV protection circuit coupled between LV node and LV output port, and control circuitry configured to detect power fault on either LV or HV supply line, isolate the LV and HV nodes from LV and HV supply lines, provide backup voltage to LV node, and cause LV protection circuit to regulate backup voltage at LV node to maintain low output voltage at LV output port to within predetermined operating range.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: November 13, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Ryan P. Mayo
  • Publication number: 20180175619
    Abstract: A power control module comprising low voltage (LV) port for receiving low supply voltage via LV supply line, high voltage (HV) input port for receiving high supply voltage via HV supply line, wherein high supply voltage is higher than low supply voltage, LV output port for providing low output voltage, HV output port for providing high output voltage, LV node coupled to LV input port, HV node coupled to HV input port, bypass circuit coupled between LV and HV nodes, LV protection circuit coupled between LV node and LV output port, and control circuitry configured to detect power fault on either LV or HV supply line, isolate the LV and HV nodes from LV and HV supply lines, provide backup voltage to LV node, and cause LV protection circuit to regulate backup voltage at LV node to maintain low output voltage at LV output port to within predetermined operating range.
    Type: Application
    Filed: February 14, 2018
    Publication date: June 21, 2018
    Inventor: Ryan P. MAYO
  • Patent number: 9899834
    Abstract: A power control module comprising low voltage (LV) port for receiving low supply voltage via LV supply line, high voltage (HV) input port for receiving high supply voltage via HV supply line, wherein high supply voltage is higher than low supply voltage, LV output port for providing low output voltage, HV output port for providing high output voltage, LV node coupled to LV input port, HV node coupled to HV input port, bypass circuit coupled between LV and HV nodes, LV protection circuit coupled between LV node and LV output port, and control circuitry configured to detect power fault on either LV or HV supply line, isolate the LV and HV nodes from LV and HV supply lines, provide backup voltage to LV node, and cause LV protection circuit to regulate backup voltage at LV node to maintain low output voltage at LV output port to within predetermined operating range.
    Type: Grant
    Filed: November 18, 2015
    Date of Patent: February 20, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Ryan P. Mayo
  • Patent number: 9823294
    Abstract: A negative voltage testing including a monitoring and triggering circuit coupled to a supply voltage rail of a device under test (DUT) and a switching circuit coupled to the monitoring and triggering circuit. The monitoring and triggering circuit is configured to cause the switching circuit to provide a first negative voltage to the supply voltage rail when a supply voltage on the supply voltage rail decays below a predetermined level during a first test of the DUT.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: November 21, 2017
    Assignee: Western Digital Technologies, Inc.
    Inventors: Christopher Aiello, Ryan P. Mayo, William K. Laird, John R. Agness
  • Patent number: 9304560
    Abstract: A data storage device (DSD) includes a power supply from a host and a charge storage element. A current transient is detected on the power supply from the host and it is determined whether the current transient exceeds a current threshold. When the current transient exceeds the current threshold, power is drawn from the charge storage element to reduce power drawn from the host.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: April 5, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: William K. Laird, John R. Agness, Henry S. Ung, Ryan P. Mayo
  • Publication number: 20140380067
    Abstract: A data storage device (DSD) includes a power supply from a host and a charge storage element. A current transient is detected on the power supply from the host and it is determined whether the current transient exceeds a current threshold. When the current transient exceeds the current threshold, power is drawn from the charge storage element to reduce power drawn from the host.
    Type: Application
    Filed: August 2, 2013
    Publication date: December 25, 2014
    Applicant: WESTERN DIGITAL TECHNOLOGIES, INC.
    Inventors: WILLIAM K. LAIRD, JOHN R. AGNESS, HENRY S. UNG, RYAN P. MAYO