Patents by Inventor Ryan Patz

Ryan Patz has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190348312
    Abstract: A method for detecting an endpoint of a seasoning process in a process chamber includes obtaining seasoning progress data indicating a progress of the seasoning process for each substrate of a first plurality of substrates, and collecting historical parameter values from a plurality of sensors disposed in the process chamber. The historical parameter values for each substrate of the first plurality of substrates are normalized with respect to a plurality of parameter values for a particular substrate in the first plurality of substrates. An MVA model is generated by applying a set of coefficients to the normalized parameter values for each substrate of the first plurality of substrates, and the set of coefficients are regressed based on the seasoning progress data. An end point of the seasoning process is determined using the MVA model with a plurality of substantially real-time parameter values measured when performing a seasoning process over each substrate of a second plurality of substrates.
    Type: Application
    Filed: May 3, 2019
    Publication date: November 14, 2019
    Inventors: Subrahmanyam Venkata Rama KOMMISETTI, Eda TUNCEL, Shayne SMITH, Liming ZHANG, Sathyendra GHANTASALA, Ryan PATZ
  • Publication number: 20130309785
    Abstract: Methods and apparatus for semiconductor manufacturing process monitoring and control are provided herein. In some embodiments, apparatus for substrate processing may include a process chamber for processing a substrate in an inner volume of the process chamber; a radiation source disposed outside of the process chamber to provide radiation at a frequency of about 200 GHz to about 2 THz into the inner volume via a dielectric window in a wall of the vacuum process chamber; a detector to detect the signal after having passed through the inner volume; and a controller coupled to the detector and configured to determine the composition of species within the inner volume based upon the detected signal.
    Type: Application
    Filed: April 23, 2013
    Publication date: November 21, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: ZHIFENG SUI, MICHAEL D. ARMACOST, PHILLIP STOUT, LEI LIAN, RYAN PATZ
  • Publication number: 20110253670
    Abstract: Methods for etching silicon-based antireflective layers are provided herein. In some embodiments, a method of etching a silicon-based antireflective layer may include providing to a process chamber a substrate having a multiple-layer resist thereon, the multiple-layer resist comprising a patterned photoresist layer defining features to be etched into the substrate disposed above a silicon-based antireflective coating; and etching the silicon-based antireflective layer through the patterned photoresist layer using a plasma formed from a process gas having a primary reactive agent comprising a chlorine-containing gas. In some embodiments, the chlorine-containing gas is chlorine (Cl2).
    Type: Application
    Filed: October 1, 2010
    Publication date: October 20, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: YIFENG ZHOU, QINGJUN ZHOU, RYAN PATZ, JEREMIAH T. PENDER, MICHAEL D. ARMACOST
  • Publication number: 20100043821
    Abstract: Described herein are methods and apparatus for removing photoresist in the presence of low-k dielectric layers. In one embodiment, the method includes exciting a first mixture of gases having a ratio of a flow rate of reducing process gas to a flow rate of an oxygen-containing process gas that is between 1:1 and 100:1 to generate a first reactive gas mixture. Next, the method includes exposing the photoresist layer that overlays the low-k dielectric layer on a substrate to the first reactive gas mixture to selectively remove the photoresist layer from the dielectric layer. Next, the method includes exposing the photoresist layer to a second reactive gas mixture to selectively remove the photoresist layer from the dielectric layer. The first and second reactive gas mixtures contain substantially no ions when the substrate is exposed to these mixtures in order to minimize damage to the low-k dielectric layer.
    Type: Application
    Filed: August 19, 2008
    Publication date: February 25, 2010
    Inventors: Siyi Li, Ryan Patz, Qingjun Zhou, Jeremiah Pender, Michael D. Armacost
  • Publication number: 20100022091
    Abstract: Described herein are methods and apparatuses for etching low-k dielectric layers to form various interconnect structures. In one embodiment, the method includes forming an opening in a resist layer. The method further includes etching a porous low-k dielectric layer with a process gas mixture that includes a fluorocarbon gas and a carbon dioxide (CO2) gas to form vias. The fluorocarbon gas may be C4F6 gas. A ratio of a flow rate of the C4F6 gas to a flow rate of the CO2 gas can vary from approximately 1:2 to 1:10. In another embodiment, the porous low-k dielectric layer is etched with a process gas mixture that includes a fluorocarbon gas and an argon gas with no CHF3 gas to form trenches aligned with the vias in an integrated dual-damascene structure. The fluorocarbon gas may be CF4 gas.
    Type: Application
    Filed: July 25, 2008
    Publication date: January 28, 2010
    Inventors: SIYI LI, Qingjun Zhou, Ryan Patz, Yifeng Zhou, Jeremiah Pender, Michael D. Armacost