Patents by Inventor Ryan Puga Nakamoto

Ryan Puga Nakamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and apparatus for performing signature verification by offloading values to a server
    Patent number: 10628609
    Abstract: In an aspect, an apparatus obtains at least a first input value and a second input value from a sender device. The apparatus performs a computational operation between portions of the first input value and portions of the second input value to obtain a plurality of partial results of the computational operation. The apparatus applies a hash function to each of the plurality of partial results of the computational operation to obtain a hash of a final result of the computational operation between the first input value and the second input value. The apparatus obtains the final result of the computational operation from the sender device. The apparatus verifies that the final result of the computational operation from the sender device is correct based on the hash of the final result of the computational operation.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: April 21, 2020
    Assignee: Qualcomm Incorporated
    Inventors: Daniel Godas-Lopez, Robert Terashima, Ryan Puga Nakamoto
  • METHOD AND APPARATUS FOR PERFORMING SIGNATURE VERIFICATION BY OFFLOADING VALUES TO A SERVER
    Publication number: 20180341786
    Abstract: In an aspect, an apparatus obtains at least a first input value and a second input value from a sender device. The apparatus performs a computational operation between portions of the first input value and portions of the second input value to obtain a plurality of partial results of the computational operation. The apparatus applies a hash function to each of the plurality of partial results of the computational operation to obtain a hash of a final result of the computational operation between the first input value and the second input value. The apparatus obtains the final result of the computational operation from the sender device. The apparatus verifies that the final result of the computational operation from the sender device is correct based on the hash of the final result of the computational operation.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 29, 2018
    Inventors: Daniel Godas-Lopez, Robert Terashima, Ryan Puga Nakamoto