Abstract: EGs may be combined with ZNSs to offer greater control of how, where and under what configurations, data is stored to various user-defined sections on a SSD. In embodiments, this exposure of control functionalities to an SSD host provides improved performance to data center and other hyperscale users and their clients. In embodiments, larger SSDs may be partitioned into groups of zones for better usage by host devices. In embodiments, the groups may comprise, for example, EGs, sets and MUs, each containing a defined number of zones. In one or more embodiments, hosts may use different EGs to access the device and thereby manage die or channel conflicts in the SSD.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: A method and system for improved foggy-fine programming includes data that can be written to SLC memory. Then, the data can be decoded and then both foggy and finely written to MLC. After the decoding, the data can be stored in DRAM located in a front end or in a SRAM located in a flash manager prior to being written to MLC. After storing in either the DRAM or SRAM, the data is then decoded and written to MLC.

Abstract: The present disclosure generally relates to methods of operating storage devices. The storage device is comprised of a controller, a random access memory (RAM) unit, and a NVM unit, wherein the NVM unit is comprised of a plurality of zones. The RAM unit comprises a first logical to physical address table and the NVM unit comprises a second logical to physical address table. The zones are partitioned into sections, and each partitioned section aligns with a change log table. Data is written to each zone sequentially, and only one partitioned section is updated at a time for each zone. Each time a zone is erased or written to in the NVM unit, the first logical to physical address table is updated and the second logical to physical address table is periodically updated to match the first logical to physical address table.

Abstract: The present disclosure generally relates to improved foggy-fine programming. The data can be written to SLC memory. Then, the data can be decoded and then both foggy and finely written to MLC. After the decoding, the data can be stored in DRAM located in a front end or in a SRAM located in a flash manager prior to being written to MLC. After storing in either the DRAM or SRAM, the data is then decoded and written to MLC.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: Data can be written to SLC memory. Then, the data can be decoded and then both foggy and finely written to MLC. After the decoding, the data can be stored in DRAM located in a front end or in a SRAM located in a flash manager prior to being written to MLC. After storing in either the DRAM or SRAM, the data is then decoded and written to MLC.

Abstract: The present disclosure generally relates to improved foggy-fine programming. The data to be written initially passes through an encoder before being written to SLC. While the data is being written to SLC, the data also passes through DRAM before going through the encoder to prepare for fine writing. The data that is to be stored in SLC is in latches in the memory device and is then written to MLC as a foggy write. Thereafter, the data that has passed through the encoder is fine written to MLC. The programming occurs in a staggered fashion where the ratio of SLC:foggy:fine writing is 4:1:1. To ensure sufficient XOR context management, programming across multiple dies, as well as across multiple super-devices, is staggered so that only four XOR parity context are necessary across 64 dies.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: The various implementations described herein include systems, methods, and/or devices used to selectively throttle host reads in memory devices. The method includes: (1) identifying a storage location in the non-volatile memory system with high read disturbs vulnerable to reliability issues, (2) determining if the identified storage location is being throttled for host reads, (3) in accordance with a determination that the identified storage location does not satisfy the predefined read throttling criteria, initiate execution of a read operation, otherwise, enqueue read commands for deferred execution.

Abstract: The various implementations described herein include systems, methods and/or devices used for garbage collection in memory system. The method includes: (1) determining occurrences of triggering events including data reclamation events, urgent data integrity recycling events, and scheduled data integrity recycling events, and (2) recycling, in response to each of a plurality of triggering events, data in a predefined quantity of memory units from a source memory portion to a target memory portion of the memory system. A respective data reclamation event corresponds to the occurrence of host data write operations in accordance with a target reclamation to host write ratio. A respective urgent data integrity recycling event occurs when a memory portion satisfies predefined urgent read disturb criteria. A respective scheduled data integrity recycling event occurs at a rate corresponding to a projected quantity of memory units to be recycled by the memory system over a period of time.

Abstract: A storage system with a controller having a persistent memory interface to local memory is provided. The persistent memory can be used to store a logical-to-physical address table. A logical-to-physical address table manager, local to the controller or remote in a secondary controller, can be used to access the logical-to-physical address table. The manager can be configured to improve bandwidth and performance in the storage system.

Abstract: The various implementations described herein include systems, methods, and/or devices used to selectively throttle host reads in memory devices. The method includes: (1) identifying a storage location in the non-volatile memory system with high read disturbs vulnerable to reliability issues, (2) determining if the identified storage location is being throttled for host reads, (3) in accordance with a determination that the identified storage location does not satisfy the predefined read throttling criteria, initiate execution of a read operation, otherwise, enqueue read commands for deferred execution.

Abstract: The various implementations described herein include systems, methods and/or devices used for garbage collection in memory system. The method includes: (1) determining occurrences of triggering events including data reclamation events, urgent data integrity recycling events, and scheduled data integrity recycling events, and (2) recycling, in response to each of a plurality of triggering events, data in a predefined quantity of memory units from a source memory portion to a target memory portion of the memory system. A respective data reclamation event corresponds to the occurrence of host data write operations in accordance with a target reclamation to host write ratio. A respective urgent data integrity recycling event occurs when a memory portion satisfies predefined urgent read disturb criteria. A respective scheduled data integrity recycling event occurs at a rate corresponding to a projected quantity of memory units to be recycled by the memory system over a period of time.

Abstract: Methods, systems and/or devices are used for limiting write command execution in a storage device comprising a set of non-volatile memory devices. In one aspect, the method includes (1) accessing in a holding queue host-specified write commands specified by a host system, each of the host-specified write commands specifying a number of pages to be written to the set of non-volatile memory devices; (2) in accordance with a determination that throttling is enabled: (3) determining a limit number of pages for a current throttle period in accordance with a throttle rate, the throttle rate being a maximum write rate for executing host-specified write commands; and (4) during the current throttle period, moving from the holding queue to a pending queue, for execution by the set of non-volatile memory devices, host-specified write commands whose total specified number of pages does not exceed the limit number of pages.

Abstract: A method of operation in a non-volatile memory system includes starting execution of a first memory operation from a first queue and in conjunction with starting a first timer, set to expire after a first predetermined time interval. The method further includes, in accordance with a determination that the first timer has expired, determining whether a second queue contains at least one memory operation for execution, and if so, suspending the first memory operation, executing a second memory operation from the second queue, and after completing execution of the second memory operation from the second queue, performing one or more subsequent operations (e.g., resuming execution of the first memory operation and restarting the first timer). In addition, the method includes, when the second queue does not contain at least one memory operation for execution, restarting the first timer, and continuing execution of the first memory operation from the first queue.

Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.

Abstract: Methods, systems and/or devices are used for limiting write command execution in a storage device comprising a set of non-volatile memory devices. In one aspect, the method includes (1) accessing in a holding queue host-specified write commands specified by a host system, each of the host-specified write commands specifying a number of pages to be written to the set of non-volatile memory devices; (2) in accordance with a determination that throttling is enabled: (3) determining a limit number of pages for a current throttle period in accordance with a throttle rate, the throttle rate being a maximum write rate for executing host-specified write commands; and (4) during the current throttle period, moving from the holding queue to a pending queue, for execution by the set of non-volatile memory devices, host-specified write commands whose total specified number of pages does not exceed the limit number of pages.

Abstract: A method of operation in a non-volatile memory system includes starting execution of a first memory operation from a first queue and in conjunction with starting a first timer, set to expire after a first predetermined time interval. The method further includes, in accordance with a determination that the first timer has expired, determining whether a second queue contains at least one memory operation for execution, and if so, suspending the first memory operation, executing a second memory operation from the second queue, and after completing execution of the second memory operation from the second queue, performing one or more subsequent operations (e.g., resuming execution of the first memory operation and restarting the first timer). In addition, the method includes, when the second queue does not contain at least one memory operation for execution, restarting the first timer, and continuing execution of the first memory operation from the first queue.

Abstract: The various embodiments described herein include methods and/or systems for throttling power in a storage device. In one aspect, a method of operation in a storage system includes obtaining a power metric corresponding to a count of active memory commands in the storage system, where active memory commands are commands being executed by the storage system. The method further includes, in accordance with a determination that the power metric satisfies one or more power thresholds, deferring execution of one or more pending memory commands.