Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Based at least in part on determining that edge buffers corresponding to one or more potentially interfering analog signal lines include edge data corresponding to post-target pulse edges, one or more potentially interfering signal patterns are identified. A selected set of the potentially interfering signal patterns are used to modify the target signal pattern to perform preemptive interference mitigation.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.

Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Based at least in part on determining that edge buffers corresponding to one or more potentially interfering analog signal lines include edge data corresponding to post-target pulse edges, one or more potentially interfering signal patterns are identified. A selected set of the potentially interfering signal patterns are used to modify the target signal pattern to perform preemptive interference mitigation.

Abstract: A method for mitigating interference across analog signal lines includes receiving a digital data stream including a plurality of discrete signal patterns configured to drive a plurality of different analog signal lines. An edge buffer for each analog signal line is populated with edge data representing pulse edges of upcoming signal patterns set to drive the analog signal line. A target buffer for a target signal line is populated with target data representing a target signal pattern. Edge buffers corresponding to potentially interfering analog signal lines are searched to identify potentially interfering pulse edges. A set of potentially interfering pulse edges are selected for interference mitigation, and the target signal pattern is modified to perform preemptive interference mitigation based at least in part on the selected pulse edges.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: One example provides, on a scanning mirror display system, a method for communicating timing information for light samples that are scanned to form a displayed image. The method comprises, for a line of light samples, encoding timing information for a first light sample of the line of light samples using a first, greater number of bits to form encoded timing information for the first light sample. The method further comprises encoding timing information for a subsequent light sample of the line of light samples by computing a derivative based upon a timing of the subsequent light sample compared to a prior light sample, encoding the derivative using a second, lesser number of bits to form encoded timing information for the subsequent light sample, and sending the information for the first light sample and the subsequent light sample across the communications channel.

Abstract: One example provides, on a scanning mirror display system, a method for communicating timing information for light samples that are scanned to form a displayed image. The method comprises, for a line of light samples, encoding timing information for a first light sample of the line of light samples using a first, greater number of bits to form encoded timing information for the first light sample. The method further comprises encoding timing information for a subsequent light sample of the line of light samples by computing a derivative based upon a timing of the subsequent light sample compared to a prior light sample, encoding the derivative using a second, lesser number of bits to form encoded timing information for the subsequent light sample, and sending the information for the first light sample and the subsequent light sample across the communications channel.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: Improved techniques for recovering from an error condition without requiring a re-transmittal of data across a high-speed data link and for improved power usage are disclosed herein. A data stream is initiated. This stream includes different types of packets. Error correcting code (ECC) is selectively imposed on a control data type packet. A transmitter node and a receiver node are connected via a hard link that has multiple virtual channels. Each virtual channel is associated with a corresponding power-consuming node. When the receiver node receives the control data type packet, error correction is performed if needed without re-transmittal. When a final data type packet is transmitted for each virtual channel, the transmitter node transmits an end condition type packet. A corresponding power-consuming node that corresponds to the respective virtual channel transitions from an active state to a low power state.

Abstract: Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data and multiple LSR processing engines.

Abstract: Optimizations are provided for late stage reprojection processing for a multi-layered scene. A multi-layered scene is generated. Late stage reprojection processing is applied to a first layer and different late stage reprojection processing is applied to a second layer. The late stage reprojection processing that is applied to the second layer includes one or more transformations that are applied to the second layer. After the late stage reprojection processing on the various layers is complete, a unified layer is created by compositing the layers together. Then, the render the unified layer is rendered.

Abstract: Optimizations are provided for late stage reprojection processing for a multi-layered scene. A scene is generated, which is based on a predicted pose of a portion of a computer system. A sub-region is identified within one of the layers and is isolated from the other regions in the scene. Thereafter, late stage reprojection processing is applied to that sub-region selectively/differently than other regions in the scene that do not undergo the same late state reprojection processing.

Abstract: Systems and methods for multistage post-rendering image transformation are provided. The system may include a transform generation module arranged to dynamically generate an image transformation. The system may include a transform data generation module arranged to generate first and second transformation data by applying the generated image transformation for first and second sampling positions and storing the transformation data in a memory. The system may include a first image transformation stage that selects the first and second transformation data for a destination image position and calculates an estimated source image position based on the selected first and second transformation data.

Abstract: Techniques for controlling access to a memory are provided. The techniques may include receiving and storing output pixel data in a buffer, providing the stored output pixel data to a display controller, receiving stored output pixel data from the buffer at the display controller, switching to a second operating mode state based at least on an amount of available data in the buffer being less than or equal to a threshold, identifying a portion of the image data stored in a memory device for use in generating output pixel data for an updated image, and, in response to operating in the second operating mode, generating the output pixel data without issuing a memory read command via an interconnect to retrieve the portion of the initial image while operating in the second operating mode, and providing the output pixel data to the buffer.

Abstract: Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data and multiple LSR processing engines.

Abstract: Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data and multiple LSR processing engines.

Abstract: Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power. The systems and methods can also be adapted to work with compressed image data.