Patents by Inventor Ryan Takafuji

Ryan Takafuji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9025374
    Abstract: A method includes reading a representation of tracking data from at least a portion of a non-volatile memory. The method further includes adjusting a read voltage based on a comparison between a number of bits in tracking data as compared to a count of bits in the representation of the tracking data.
    Type: Grant
    Filed: February 2, 2013
    Date of Patent: May 5, 2015
    Assignee: Sandisk Technologies Inc.
    Inventors: Nian Niles Yang, Ryan Takafuji, Seungjune Jeon, Chris Avila, Steven Sprouse
  • Patent number: 8902669
    Abstract: Charge leakage from a floating gate in a NAND flash memory die is reduced by applying a data retention bias to a word line extending over the floating gates. The data retention bias is applied to one or more selected word lines when the memory die is in idle mode, when no read, write, erase, or other commands are being executed in the memory die.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: December 2, 2014
    Assignee: SanDisk Technologies, Inc.
    Inventors: Nian Niles Yang, Ryan Takafuji, Chris Nga Yee Avila
  • Publication number: 20140173172
    Abstract: A method includes reading a representation of tracking data from at least a portion of a non-volatile memory. The method further includes adjusting a read voltage based on a comparison between a number of bits in tracking data as compared to a count of bits in the representation of the tracking data.
    Type: Application
    Filed: February 2, 2013
    Publication date: June 19, 2014
    Applicant: SANDISK TECHNOLOGIES INC.
    Inventors: NIAN NILES YANG, RYAN TAKAFUJI, SEUNGJUNE JEON, CHRIS AVILA, STEVEN SPROUSE
  • Publication number: 20140126292
    Abstract: Charge leakage from a floating gate in a NAND flash memory die is reduced by applying a data retention bias to a word line extending over the floating gates. The data retention bias is applied to one or more selected word lines when the memory die is in idle mode, when no read, write, erase, or other commands are being executed in the memory die.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: SanDisk Technologies Inc.
    Inventors: Nian Niles Yang, Ryan Takafuji, Chris Nga Yee Avila