Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments of the present disclosure generally relate to an improved method for forming a dielectric film stack used for inter-level dielectric (ILD) layers in a 3D NAND structure. In one embodiment, the method comprises providing a substrate having a gate stack deposited thereon, forming on exposed surfaces of the gate stack a first oxide layer using a first RF power and a first process gas comprising a TEOS gas and a first oxygen-containing gas, and forming over the first oxide layer a second oxide layer using a second RF power and a second process gas comprising a silane gas and a second oxygen-containing gas.

Abstract: Embodiments described herein provide a method for forming two titanium nitride materials by different PVD processes, such that a metallic titanium nitride layer is initially formed by a PVD process in a metallic mode and a titanium nitride retarding layer is formed over a portion of the metallic titanium nitride layer by a PVD process in a poison mode. Subsequently, a first aluminum layer, such as an aluminum seed layer, may be selectively deposited on exposed portions of the metallic titanium nitride layer by a CVD process. Thereafter, a second aluminum layer, such as an aluminum bulk layer, may be deposited on exposed portions of the first aluminum layer and the titanium nitride retarding layer during an aluminum PVD process.

Abstract: Embodiments described herein provide a method for forming two titanium nitride materials by different PVD processes, such that a metallic titanium nitride layer is initially formed by a PVD process in a metallic mode and a titanium nitride retarding layer is formed over a portion of the metallic titanium nitride layer by a PVD process in a poison mode. Subsequently, a first aluminum layer, such as an aluminum seed layer, may be selectively deposited on exposed portions of the metallic titanium nitride layer by a CVD process. Thereafter, a second aluminum layer, such as an aluminum bulk layer, may be deposited on exposed portions of the first aluminum layer and the titanium nitride retarding layer during an aluminum PVD process.