Patents by Inventor Ryo Enomoto
Ryo Enomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8389867Abstract: For the purpose of providing a semiconductor element built-in type multilayered circuit board in which a semiconductor element is closely joined to a recess of an insulating substrate to effectively disperse heat generated from the semiconductor element through the insulating substrate at a working temperature region of the semiconductor element circuit board, to surely conduct an electrical connection of an electronic part such as semiconductor element or the like in a short wiring and to enable the high density mounting of semiconductor elements, miniaturization and increase of working speed, there is proposed a semiconductor element built-in type multilayered circuit board formed by laminating a plurality of semiconductor element built-in type boards each comprising an insulating substrate and a semiconductor element accommodated in a recess formed therein, characterized in that a difference between a linear expansion coefficient of the insulating substrate and a linear expansion coefficient of the semiconType: GrantFiled: September 29, 2006Date of Patent: March 5, 2013Assignees: Ibiden Co., Ltd., National University Corporation Tohoku UniversityInventors: Ryo Enomoto, Tadahiro Ohmi, Akihiro Morimoto
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Patent number: 7777328Abstract: A substrate includes a inorganic material base board has a recess and at least one penetration hole provided around the recess, and a semiconductor device accommodated in the recess and including at least one electrode pad provided on a surface of the semiconductor device. A resin filling is provided in the at least one penetration hole and has at least one through-hole for electrically connecting a top surface and a back surface of the resin filling. An insulating layer covers the surfaces of the semiconductor device, the resin filling and the inorganic material base board and has a first opening corresponding to the at least one through-hole and a second opening corresponding to the at least one electrode pad. A conductive wiring is formed on a surface of the insulating layer for electrically connecting the at least one through-hole and the at least one electrode pad.Type: GrantFiled: July 25, 2008Date of Patent: August 17, 2010Assignee: Ibiden Co., Ltd.Inventor: Ryo Enomoto
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Patent number: 7721427Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) is formed and via holes (36a) are formed by filling up the holes (40a) with a metal (46). After the via holes (36a) are formed, a conductor circuit (32a) is formed by etching the metallic layer (42) and a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) on the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in-between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b).Type: GrantFiled: October 6, 2005Date of Patent: May 25, 2010Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Yasuji Hiramatsu
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Publication number: 20080277776Abstract: A substrate includes a inorganic material base board has a recess and at least one penetration hole provided around the recess, and a semiconductor device accommodated in the recess and including at least one electrode pad provided on a surface of the semiconductor device. A resin filling is provided in the at least one penetration hole and has at least one through-hole for electrically connecting a top surface and a back surface of the resin filling. An insulating layer covers the surfaces of the semiconductor device, the resin filling and the inorganic material base board and has a first opening corresponding to the at least one through-hole and a second opening corresponding to the at least one electrode pad. A conductive wiring is formed on a surface of the insulating layer for electrically connecting the at least one through-hole and the at least one electrode pad.Type: ApplicationFiled: July 25, 2008Publication date: November 13, 2008Applicant: IBIDEN CO., LTD.Inventor: Ryo ENOMOTO
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Publication number: 20070096289Abstract: For the purpose of providing a semiconductor element built-in type multilayered circuit board in which a semiconductor element is closely joined to a recess of an insulating substrate to effectively disperse heat generated from the semiconductor element through the insulating substrate at a working temperature region of the semiconductor element circuit board, to surely conduct an electrical connection of an electronic part such as semiconductor element or the like in a short wiring and to enable the high density mounting of semiconductor elements, miniaturization and increase of working speed, there is proposed a semiconductor element built-in type multilayered circuit board formed by laminating a plurality of semiconductor element built-in type boards each comprising an insulating substrate and a semiconductor element accommodated in a recess formed therein, characterized in that a difference between a linear expansion coefficient of the insulating substrate and a linear expansion coefficient of the semiconType: ApplicationFiled: September 29, 2006Publication date: May 3, 2007Applicants: IBIDEN CO., LTD, NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Ryo Enomoto, Tadahiro Ohmi, Akihiro Morimoto
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Publication number: 20060037193Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) is formed and via holes (36a) are formed by filling up the holes (40a) with a metal (46). After the via holes (36a) are formed, a conductor circuit (32a) is formed by etching the metallic layer (42) and a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) on the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in-between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b).Type: ApplicationFiled: October 6, 2005Publication date: February 23, 2006Applicant: IBIDEN Co., LTD.Inventors: Ryo Enomoto, Yasuji Hiramatsu
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Patent number: 6896460Abstract: A fastener for connecting plate members includes a male member, and a female member to be inserted into mounting holes of the plate members. The female member includes a cylinder body for receiving the main body therein, a projecting portion formed on an outer periphery of the cylinder body at one end thereof, and protruding portions formed at the other end thereof. A first engaging portion is formed on an outer surface of a main body of the male member or an inner surface of the cylinder body, and a second engaging portion engaging the first engaging portion is formed on the inner surface or the outer surface. The second engaging portion has two engaging sections and a smooth surface portion interposed therebetween. When the male member is inserted into the female member, the male member can be easily engaged with the female member.Type: GrantFiled: January 7, 2002Date of Patent: May 24, 2005Assignee: Nifco Inc.Inventors: Ryo Enomoto, Taku Tashima, Tadashi Ozeki
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Patent number: 6889433Abstract: By filling a predetermined amount of conductive paste into an opening for forming a through hole or a VH formed in a resin insulating layer of a circuit board, and pressurizing the filled conductive paste under the condition of reduced pressure, removing air bubble strapped in the conductive paste.Type: GrantFiled: July 10, 2000Date of Patent: May 10, 2005Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Takashi Kariya, Hajime Sakamoto
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Patent number: 6831235Abstract: Each via hole of a printed wiring board is filled with a metal conductor. A distal end of each metal conductor is covered with a diffusing metal layer. The distal end of the metal conductor is pressed against a conductor circuit of another substrate, and the printed wiring boards are bonded together by thermocompression bonding. The metal of the distal end of each metal conductor is diffused into the metal of the conductor circuit so that an alloy layer is formed in an interface. As a result, reliability in the interlayer electrical connection can be improved.Type: GrantFiled: December 17, 2001Date of Patent: December 14, 2004Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Masanori Tamaki
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Publication number: 20030141108Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) is formed and via holes (36a) are formed by filling up the holes (40a) with a metal (46). After the via holes (36a) are formed, a conductor circuit (32a) is formed by etching the metallic layer (42) and a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) on the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in-between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b).Type: ApplicationFiled: February 5, 2003Publication date: July 31, 2003Applicant: IBIDEN CO., Ltd.Inventors: Ryo Enomoto, Yasuji Hiramatsu
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Patent number: 6586686Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) if formed. After the holes (40A) are formed, via holes (36a) are formed by filling up the holes (40a) with a metal (46) and a conductor circuit (32a) is formed by etching the metallic layer (42). Then, a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) of the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b).Type: GrantFiled: December 2, 1999Date of Patent: July 1, 2003Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Yasuji Hiramatsu
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Patent number: 6518513Abstract: Holes (40a) are formed with a laser beam through an insulating substrate (40) on which a metallic layer (42) is formed and via holes (36a) are formed by filling up the holes (40a) with a metal (46). After the via holes (36a) are formed, a conductor circuit (32a) is formed by etching the metallic layer (42) and a single-sided circuit board (30A) is formed by forming projecting conductors (38a) on the surfaces of the via holes (36a). The projecting conductors (38a) on the circuit board (30A) are put on the conductor circuit (32b) of another single-sided circuit board (30B) with adhesive layers (50) composed of an uncured resin in-between and heated and pressed against the circuit (32b). The projecting conductors (38a) get in the uncured resin by pushing aside the resin and are electrically connected to the circuit (32b).Type: GrantFiled: December 3, 1999Date of Patent: February 11, 2003Assignee: Ibiden Co. Ltd.Inventors: Ryo Enomoto, Yasuji Hiramatsu
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Patent number: 6492255Abstract: A via 42 is formed by copper plating on a surface of an aluminum electrode pad 32 of a semiconductor chip 30. Since the via 42 having flexibility absorbs a stress generated due to a difference in thermal expansion between the semiconductor chip 30 and a substrate, the semiconductor chip 30 can be mounted onto the substrate 50 with high reliability and connection reliability of the semiconductor chip 30 can be enhanced.Type: GrantFiled: March 30, 2001Date of Patent: December 10, 2002Assignee: Ibiden Co., LTDInventors: Ryo Enomoto, Hideo Yabashi, Tadashi Sugiyama, Kenzo Hatada
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Publication number: 20020094253Abstract: A fastener for connecting plate members includes a male member, and a female member to be inserted into mounting holes of the plate members. The female member includes a cylinder body for receiving the main body therein, a projecting portion formed on an outer periphery of the cylinder body at one end thereof, and protruding portions formed at the other end thereof. A first engaging portion is formed on an outer surface of a main body of the male member or an inner surface of the cylinder body, and a second engaging portion engaging the first engaging portion is formed on the inner surface or the outer surface. The second engaging portion has two engaging sections and a smooth surface portion interposed therebetween. When the male member is inserted into the female member, the male member can be easily engaged with the female member.Type: ApplicationFiled: January 7, 2002Publication date: July 18, 2002Inventors: Ryo Enomoto, Taku Tashima, Tadashi Ozeki
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Publication number: 20010049187Abstract: A via 42 is formed by copper plating on a surface of an aluminum electrode pad 32 of a semiconductor chip 30. Since the via 42 having flexibility absorbs a stress generated due to a difference in thermal expansion between the semiconductor chip 30 and a substrate, the semiconductor chip 30 can be mounted onto the substrate 50 with high reliability and connection reliability of the semiconductor chip 30 can be enhanced.Type: ApplicationFiled: March 30, 2001Publication date: December 6, 2001Applicant: IBIDEN, CO., LTD.Inventors: Ryo Enomoto, Hideo Yabashi, Tadashi Sugiyama, Kenzo Hatada
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Patent number: 6320140Abstract: A single-sided circuit substrate for a multilayer printed writing board has an insulating hard substrate, a conductor circuit formed on a surface of the substrate, an adhesive layer formed on the other surface, and at least one viahole through the substrate and the adhesive layer so as to pass these layers and contact with the conductor. The viaholes are filled with conductive paste. The invention also provides a multilayer printed wiring board having an IVH structure constituted with single-sided circuit hard substrates and a method of efficiently manufacturing the same with high yield.Type: GrantFiled: December 10, 1998Date of Patent: November 20, 2001Assignee: Ibiden Co., Ltd.Inventor: Ryo Enomoto
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Patent number: 5589255Abstract: An adhesive for electroless plating is formed by dispersing particular heat-resistant granules easily soluble in an oxidizing agent into a particular heat-resistant resin sparingly soluble in the oxidizing agent through a curing treatment. A printed circuit board is manufactured by using such an adhesive.Type: GrantFiled: June 3, 1994Date of Patent: December 31, 1996Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Motoo Asai
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Patent number: 5512712Abstract: Improved printed wiring boards are disclosed, in which indications showing the types of electronic devices to be mounted on the printed wiring boards and other information are provided within the insulation cover coating and are protected from getting accidentally scraped off. Alignment marks are also well protected so that users can always rely on the alignment marks. The surfaces of the printed wiring boards are smooth and flat, which prevents stagnation trouble in a feeding operation of the printed wiring boards as well as helps provide a securer mounting of electronic devices. An improved wiring freedom is also provided.Type: GrantFiled: October 12, 1994Date of Patent: April 30, 1996Assignee: Ibiden Co., Ltd.Inventors: Yutaka Iwata, Ryo Enomoto, Akihito Nakamura, Akihiro Demura
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Patent number: 5273941Abstract: It relates to fiber reinforced silicon carbide ceramics in which heat-resistant inorganic short fibers such as flawless SiC or Si.sub.3 N.sub.4 are three-dimensionally dispersed in a matrix composed of silicon carbide and entangled with each other to form a high strength shaped body as well as a method of producing the same. Further, it relates to high density silicon carbide ceramica in which metallic silicon is filled in pores of the shaped body, so that these fiber reinforced silicon carbide ceramics possesses both high strength and high toughness and are composite ceramics suitable as a heat-resistant structural material or a material with bio hard texture.Type: GrantFiled: September 27, 1989Date of Patent: December 28, 1993Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Yoshimi Matsuno, Masato Yokoi
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Patent number: 5260263Abstract: A superconductive ceramic wire material composed of rare earth elements, alkali earth metals, copper, and oxygen, which is obtained by mixing a powder containing oxides of the component elements of the superconductive ceramic with a solution containing organic compounds of the component elements, forming the mixture into a wire, and firing the wire in a temperature range from 850.degree. to 949.degree. C. in an oxygen-containing atmosphere.Type: GrantFiled: June 8, 1989Date of Patent: November 9, 1993Assignee: Ibiden Co., Ltd.Inventors: Ryo Enomoto, Yoshimi Matsuno, Masanori Tamaki