Abstract: In one embodiment, a modulo addressing unit for a processor is described that includes a plurality of adders to generate an uncorrected target module address and at least one corrected target module address in parallel. A comparator selects one of the target module addresses a function of a base address (b) for a circular buffer, a length (L) of the circular buffer, an index address (I) and a modifier value (M). In one embodiment the comparator selects a first corrected target module address when I+M<B, a second corrected target module address when I+M>=B+L and an uncorrected module address when B<=I+M<B+L.

Abstract: In one embodiment, a programmable processor is adapted to conditionally move data between a pointer register and a data register in response to a single machine instruction. The processor has a plurality of pipelines. In response to the machine instruction, a control unit directs the pipelines to forward the data across the pipelines in order to move the data between the registers.

Abstract: Methods and apparatus are provided for transferring data words from a source to a destination. The apparatus includes a datapath buffer coupled by a first data bus to the source and coupled by a second data bus to the destination, write control logic for writing a first number of data words in the datapath buffer in response to a first source transfer condition and for writing a second number of data words in the datapath buffer in response to a second source transfer condition, and read control logic for reading the first number of data words from the datapath buffer in response to a first destination transfer condition and for reading the second number of data words from the datapath buffer in response to a second destination transfer condition.

Abstract: The present invention relates to a field-emission display having a faceplate formed with a phosphor layer and means irradiating an electron beam onto the phosphor layer in order to improve the characteristic of life of the device. The feature of the present invention is in the structure of a phosphor layer. The phosphor layer is expressed by a general formula: ZnS: M, Al where M is an activator of at least one of Cu, Ag and Au; and Al is a coactivator, in which the concentration of Al is higher than that of M. According to the present invention, the electrification characteristic of the phosphor is improved for lower resistance. The defect concentration of the surface of the phosphor is reduced. The filed-emission display which can realize improvement in the characteristic of life which has not been solved in the prior art can be made.

Abstract: According to the present invention, in an image-forming apparatus having at least two chargers for charging a rotating image carrier, in accordance with change in bias applied to a second charger disposed on the downstream side in a rotational direction of the image carrier, the bias applied to a first charger disposed on the upstream side is changed. Thereby, the electric power required for the charging is reduced.

Abstract: The charging apparatus includes plural charging devices including a first charging device and a second charging device, in which an absolute value of a current flowing from the second charging device to a member to be charged is 25% or less of an absolute value of a sum of currents respectively flowing from the plural charging devices to the member to be charged, thereby achieving uniform charging of the member to be charged.

Abstract: An image forming apparatus includes an image bearing member, a charging member, disposed so as to be contactable with the image bearing member, for charging the image bearing member with a peripheral velocity difference between the charging member and the image bearing member, and a controller for variably controlling the peripheral velocity difference at the time when an area which becomes an image forming area of the image bearing member is charged by the charge member.

Abstract: To provide a charging apparatus including: a first charging unit for charging a body to be charged, the first charging unit including a magnetic brush that contacts the body to be charged; and a second charging unit that is provided on a downstream side of the first charging unit with respect to a moving direction of the body to be charged, the second charging unit including a magnetic brush that contacts the body to be charged, in which a contact width, with which the magnetic brush of the first charging unit contacts the body to be charged, is wider than a contact width with which the magnetic brush of the second charging unit contacts the body to be charged.

Abstract: An image forming apparatus capable of making potential control executable immediately after starting copying and shortening a first copying time includes a photosensitive drum (1), a charging magnetic brush charger (2) for charging the photosensitive drum (1) and a main electricity eliminating light irradiating apparatus (8) for irradiating light to eliminate a light memory in the photosensitive drum 1. The main electricity eliminating light irradiating apparatus (8) irradiates the photosensitive drum (1) with an exposure amount larger than a minimum exposure amount for eliminating a light memory in at least a part of an irradiation process.

Abstract: In one embodiment, a programmable processor is adapted to include a first set of registers and a second set of registers. The first set of registers may comprise a future file, and the second set of registers may be architectural registers. Following a termination of an instruction in the processor, the future file may be restored with values in the second set of registers. Restoring the future file may take more than one clock cycle.

Abstract: In an embodiment, a pipelined processor may be adapted to process multi-cycle instructions (MCIs). Results generated in response to non-terminal sub-instructions may be written to a speculative commit register. When the MCI commits, i.e., a terminal sub-instruction reaches the WB stage, the value in the speculative commit register may be written to the architectural register.

Abstract: In an embodiment, a pipelined processor includes a future file for storing updated data address values generated by a data address generator (DAG). These updated values may be provided to the DAG for subsequent address calculation operations.

Abstract: In one embodiment, a modulo addressing unit for a processor is described that includes a plurality of adders to generate an uncorrected target module address and at least one corrected target module address in parallel. A comparator selects one of the target module addresses a function of a base address (b) for a circular buffer, a length (L) of the circular buffer, an index address (I) and a modifier value (M). In one embodiment the comparator selects a first corrected target module address when I+M<B, a second corrected target module address when I+M>=B+L and an uncorrected module address when B<=I+M<B+L.

Abstract: In one embodiment, a programmable processor is adapted to support hardware loops. The processor may include hardware such as a first set of registers, a second set of registers, a first pipeline, and a second pipeline. Furthermore, the processor may include a control unit adapted to efficiently implement the hardware when performing a hardware loop.

Abstract: An image forming apparatus is provided, which comprises: an image bearing member, a charging member, provided to be capable of coming into contact with the image bearing member, for charging the image bearing member with a peripheral velocity difference between the charging member and the image bearing member, and a controller for variably controlling the peripheral velocity difference at the time when charging for image formation is applied to the image bearing member by the charging member.

Abstract: In order to provide an image forming apparatus capable of making potential control executable immediately after starting copying and shortening a first copying time, the image forming apparatus is provided with a photosensitive drum (1), a charging magnetic brush charger (2) for charging the photosensitive drum (1) and a main electricity eliminating light irradiating apparatus (8) for irradiating light to eliminate a light memory in the photosensitive drum1. Further, in the image forming apparatus, the main electricity eliminating light irradiating apparatus (8) irradiates the photosensitive drum (1) with an exposure amount larger than a minimum exposure amount for eliminating a light memory in at least a part of an irradiation process.

Abstract: The invention is directed to an image processing system, which includes an image sensor (DD) for introducing image information of an object to detect image data for indicating at least a density of the object. A scanning table memory (TM) is adapted to provide addresses in accordance with horizontal or vertical scanning lines, and provide a horizontal or vertical location information for each address. Also, the memory (TM) is adapted to provide a window on the basis of the location information and in accordance with the object, and store the window in a table memory. And, an image processor (DP) is adapted to provide a desired image on the basis of a logical product of the image data and the window. The memory (TM) is adapted to provide the window for the image which will be used at the next iteration step on the basis of the desired image formed by the image processor (DP).

Abstract: A vehicle condition detecting apparatus utilizes a camera mounted on the rear of a vehicle for providing an image including lines indicative of lane boundaries. The image is processed to determine the distances from the vehicle to each line. The distances are compared with predetermined distances by an image processor. A warning device provides a warning based on variations of observed distances with respect to the predetermined distances to warn the driver if the vehicle begins to drift out of a line.

Abstract: The invention is directed to a method and apparatus for detecting a lane on a road, the latter of which includes an edge sensor (ED) for detecting edges indicative of boundaries of opposite sides of each lane, an edge memory (EM) for storing the edges to form a couple of continuous lines of edge groups indicative of the opposite boundaries of the lane, and an image processor (DP) for defining the opposite boundaries of the lane on a plane in a three-dimensional geometry. A center of curvature defining device (RC) defines a center of curvature to the opposite boundaries of the lane. An edge line extracting device (ES) divides the edge groups stored in the edge memory into a plurality of continuous regions each having a predetermined length along a concentric circle arc having the same center as the center of curvature, and extracts a pair of edge lines from each region.

Abstract: An image forming apparatus includes a charging device applies a voltage to charge an image bearing member. The charging device is provided with a charging means to which a voltage is applicable to charge said image bearing member, said charging means being provided with a magnetic particle carrying member for carrying and conveying a magnetic particle layer contacting with said image bearing member during the charging operation; a container contains magnetic particles therein; and a replacing device replaces the magnetic particles carried on the magnetic particle carrying member with the magnetic particles contained in the container. A developer develops a latent image produced on the image bearing member by the charging device using a toner to produce a toner image.