Abstract: A braking control device for controlling braking of a host vehicle. For a state in which a host vehicle is stopped in an intersection by automatic emergency braking and an oncoming vehicle is approaching in an oncoming lane, the host vehicle prohibits secondary braking is prohibited in, flashes a hazard lamp, and prohibits an idling stop. For a state in which it is determined in that the vehicle is stopped and it is determined in that it is safe for the vehicle to start moving, the host vehicle releases stop maintenance braking.

Abstract: An image processing apparatus or camera system comprises an image sensor 1, a geometrical position calculation device 6 for performing predetermined correction of a distortion, a first address table 10 for storing information correlating an input side address based on the calculation results of the geometrical position calculation device 6 to an output side address as a reference, a sort unit 11 for sorting the output side addresses according to the input side addresses, a second address table 12 for storing information correlating the output side address to the sorted input side address as a reference, and an address matching device 13 for matching the input side address of input side image data DI with the input side address stored in the second address table 12 and outputting output side image data DO.

Abstract: An image processing apparatus or camera system includes an image sensor 1, a geometrical position calculation device 6 for performing predetermined correction of a distortion, a first address table 10 for storing information correlating an input side address based on the calculation results of the geometrical position calculation device 6 to an output side address as a reference, a sort unit 11 for sorting the output side addresses according to the input side addresses, a second address table 12 for storing information correlating the output side address to the sorted input side address as a reference, and an address matching device 13 for matching the input side address of input side image data DI with the input side address stored in the second address table 12 and outputting output side image data DO.

Abstract: In an image processing apparatus that processes image data containing a distortion of an image pickup optical section, which is obtained by picking up an optical image from a subject through the image pickup optical section giving the distortion, a region selection mode setting section (13b) selectively sets a first region selection mode in which, from a field of view represented by the image data, a selected region is selected which indicates a partial region of the field of view by using an orthogonal coordinate system and a second region selection mode in which, from the field of view represented by the image data, the selected region is selected which indicates the partial region of the field of view by using a polar coordinate system. A distortion correction section (13a) corrects the distortion contained in the image data that corresponds to the selected region selected the first or second region selection mode selected in the region selection mode setting section (13b).

Abstract: An image processing apparatus is disclosed. The image processing apparatus includes a thinning-out section generating thinned-out line data of thinned-out data constituted by a plurality of the thinned-out line data, the thinned-out data being obtained by thinning out wide-field image data with distortion captured using a wide-angle lens, and sequentially outputting the thinned-out line data at every predetermined timing, a switching section performing switching from an output of the wide-field image data to an output of the thinned-out line data in response to the predetermined timing, and a buffer temporarily storing the wide-field image data and the thinned-out data constituted by the plurality of thinned-out data outputted after the switching.

Abstract: Relative to an image processing apparatus that processes image data containing a distortion of an image pickup optical section, which is obtained by picking up an optical image from a subject through the image pickup optical section giving the distortion, an image processing apparatus, an image processing method, a program therefor, a recording medium in which the program is recorded, an image pickup apparatus, which are easily used by the user conveniently, are provided. A data output section (13d) outputs the image data of a display image that corresponds to a display mode by using a subject image whose selected region which indicates a part of a field of view represented by the image data is made identifiable and a distortion-corrected image of the selected region. A display mode setting section (13c) performs setting of the display mode.

Abstract: An image processing apparatus or camera system includes an image sensor 1, a geometrical position calculation device 6 for performing predetermined correction of a distortion, a first address table 10 for storing information correlating an input side address based on the calculation results of the geometrical position calculation device 6 to an output side address as a reference, a sort unit 11 for sorting the output side addresses according to the input side addresses, a second address table 12 for storing information correlating the output side address to the sorted input side address as a reference, and an address matching device 13 for matching the input side address of input side image data DI with the input side address stored in the second address table 12 and outputting output side image data DO.

Abstract: Relative to an image processing apparatus that processes image data containing a distortion of an image pickup optical section, which is obtained by picking up an optical image from a subject through the image pickup optical section giving the distortion, an image processing apparatus, an image processing method, a program therefor, a recording medium in which the program is recorded, an image pickup apparatus, which are easily used by the user conveniently, are provided. A data output section (13d) outputs the image data of a display image that corresponds to a display mode by using a subject image whose selected region which indicates a part of a field of view represented by the image data is made identifiable and a distortion-corrected image of the selected region. A display mode setting section (13c) performs setting of the display mode.

Abstract: In an image processing apparatus that processes image data containing a distortion of an image pickup optical section, which is obtained by picking up an optical image from a subject through the image pickup optical section giving the distortion, a region selection mode setting section (13b) selectively sets a first region selection mode in which, from a field of view represented by the image data, a selected region is selected which indicates a partial region of the field of view by using an orthogonal coordinate system and a second region selection mode in which, from the field of view represented by the image data, the selected region is selected which indicates the partial region of the field of view by using a polar coordinate system. A distortion correction section (13a) corrects the distortion contained in the image data that corresponds to the selected region selected the first or second region selection mode selected in the region selection mode setting section (13b).

Abstract: An image processing apparatus is disclosed. The image processing apparatus includes a thinning-out section generating thinned-out line data of thinned-out data constituted by a plurality of the thinned-out line data, the thinned-out data being obtained by thinning out wide-field image data with distortion captured using a wide-angle lens, and sequentially outputting the thinned-out line data at every predetermined timing, a switching section performing switching from an output of the wide-field image data to an output of the thinned-out line data in response to the predetermined timing, and a buffer temporarily storing the wide-field image data and the thinned-out data constituted by the plurality of thinned-out data outputted after the switching.

Abstract: From a storage device storing waveform sample data sampled at a given sampling rate, the waveform sample data are read out asynchronously with the given sampling rate and temporarily stored in an input buffer. The thus-stored waveform sample data are read out from the input buffer and converted to an inner sampling rate selected from among a plurality of predetermined inner sampling rates. Predetermined arithmetic processing is performed on the waveform sample data converted to the selected inner sampling rate. Then, the waveform sample data having undergone the predetermined arithmetic processing are converted to a predetermined output sampling rate and written into an output buffer. The thus-written waveform sample data are then sequentially read out at an sampling frequency corresponding to the output sampling rate, to thereby generate tone data in accordance with the output sampling frequency.

Abstract: A method of entering an audio signal into a data processing apparatus, in which analog audio signals of at least two channels as the audio signal are digitized by and transmitted from an audio signal output device on a side of an audio source to an audio signal input device on a side of the data processing apparatus. A clock signal is supplied from the audio signal input device to the audio signal output device. The audio signal output device performs delta-sigma (&Dgr;&Sgr;) modulation on the analog audio signals of at least two channels so as to convert each of the analog audio signals of at least two channels into one-bit digital audio data for each of the at least two channels, based on the clock signal supplied to the audio signal output device. The one-bit digital audio data for the each channel is alternately selected based on the clock signal, to perform time-division multiplexing on the one-bit digital audio data for the at least two channels, to thereby produce one-bit multiplex audio data.

Abstract: A series of digital data to be filtered is divided into a plurality of frames, and f samples of the digital data of each of the frames are burst-transmitted via a computer bus. In transferring the digital data of any one of the frames, n samples of the digital data belonging to a next frame is transferred, along with the digital data of the one frame, to thereby transfer a time series of the digital data consisting of (f+n) samples that are more than the f samples contained in the one frame. Also, a set of k filter coefficients to be used for filtering arithmetic operations in the frame is burst-transmitted via the computer bus, where n≧k. Filtering arithmetic processor, such as a DSP, connected to the bus carries out filtering arithmetic processing using the transmitted f+n samples of the digital data and k coefficients, to provide filtered data corresponding to at least the number of samples for a single frame.

Abstract: A series of digital data to be filtered is divided into a plurality of frames, and f samples of the digital data of each of the frames are burst-transmitted via a computer bus. In transferring the digital data of any one of the frames, n samples of the digital data belonging to a next frame is transferred, along with the digital data of the one frame, to thereby transfer a time series of the digital data consisting of (f+n) samples that are more than the f samples contained in the one frame. Also, a set of k filter coefficients to be used for filtering arithmetic operations in the frame is burst-transmitted via the computer bus, where n≧k. Filtering arithmetic processor, such as a DSP, connected to the bus carries out filtering arithmetic processing using the transmitted f+n samples of the digital data and k coefficients, to provide filtered data corresponding to at least the number of samples for a single frame.

Abstract: A series of digital data to be filtered is divided into a plurality of frames, and f samples of the digital data of each of the frames are burst-transmitted via a computer bus. In transferring the digital data of any one of the frames, n samples of the digital data belonging to a next frame is transferred, along with the digital data of the one frame, to thereby transfer a time series of the digital data consisting of (f+n) samples that are more than the f samples contained in the one frame. Also, a set of k filter coefficients to be used for filtering arithmetic operations in the frame is burst-transmitted via the computer bus, where n≧k. Filtering arithmetic processor, such as a DSP, connected to the bus carries out filtering arithmetic processing using the transmitted f+n samples of the digital data and k coefficients, to provide filtered data corresponding to at least the number of samples for a single frame.

Abstract: A series of digital data to be filtered is divided into a plurality of frames, and f samples of the digital data of each of the frames are burst-transmitted via a computer bus. In transferring the digital data of any one of the frames, n samples of the digital data belonging to a next frame is transferred, along with the digital data of the one frame, to thereby transfer a time series of the digital data consisting of (f+n) samples that are more than the f samples contained in the one frame. Also, a set of k filter coefficients to be used for filtering arithmetic operations in the frame is burst-transmitted via the computer bus, where n≧k. Filtering arithmetic processor, such as a DSP, connected to the bus carries out filtering arithmetic processing using the transmitted f+n samples of the digital data and k coefficients, to provide filtered data corresponding to at least the number of samples for a single frame.

Abstract: The present invention is directed to a method for managing memory in a computer whereby memory is divided into a first and a second section, and whereby the first and second sections are separately managed via a CPU. In accordance with the preferred embodiment of the present invention, data characteristics are used to determine which one of the first or second sections the data should be stored in. When the stored data are to be read out from the first section, single physical address information corresponding to a start position of the first section is received from the CPU so that a plurality of physical addresses corresponding to the individual read addresses are generated on the basis of the received physical address.

Abstract: An A/D conversion apparatus is provided, which is capable of securing a wide dynamic range of A/D conversion with a simple construction through suitably switching the input gain of the input analog signal between predetermined levels. An input gain control device controls gain of an input signal based on a control signal. A &Dgr;&Sgr; modulator carries out oversampling of the input signal having the gain thereof controlled by the input gain control device to convert the input signal to data of one bit. A detecting device detects a peak value of the input signal based on the data of one bit. A gain control device generates the control signal based on the peak value detected by the detecting device in a manner such that the input signal having the gain thereof controlled falls within a predetermined range.

Abstract: A plurality of analog signals are subjected to a delta sigma modulation for conversion into respective bitstream data (PDM). The respective bitstream data are weighted for conversion into respective plural-bit PCM data, and then these plural-bit PCM data corresponding to the analog signals are added together. At that time, optional PCM to be mixed with the analog signals may also be added. PCM data resultant from the addition is then subjected to a delta sigma modulation for conversion into bitstream data. In this way, the mixed data is provided as one bitstream data. The mixed data can be coded as PCM data by performing a decimation process on the mixed data. The mixed data can also be provided as analog data by subjecting the mixed data to an analog low-pass filtering process.

Abstract: Tone generator device, which is applied to a computer, has no waveform memory of its own and is connected via an extended bus to the computer having a main memory where waveform sample data are prestored. When a tone of predetermined pitch is to be reproduced, the tone generator device designates a block of a specific quantity of the waveform sample data in accordance with the pitch to be reproduced and requests that the block be read out from the main memory and burst-transmitted via the extended bus. The burst-transmitted waveform sample data are temporarily stored in an input buffer and then read out from the buffer in accordance with pitch information to generate tone waveform data of the desired pitch. The burst transmission of the data block and subsequent tone waveform data generation are carried out at high speed asynchronously with a predetermined reproduction sampling cycle. The generated tone waveform data are output via an output data in the predetermined reproduction sampling cycle.