Patents by Inventor Ryo Kanai

Ryo Kanai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136880
    Abstract: An insulator attached to a core body in an annular shape and multiple teeth protruding from the core body along a radial direction for insulating the teeth and a coil wound around the teeth includes: a tooth end surface covering part covering an axial end surface of the tooth. The tooth end surface covering part includes: an inclined part provided on a front surface of the tooth end surface covering part on a side opposite to the tooth and inclined such that its height from the axial end surface of the tooth gradually changes along the radial direction; and an inclined part parallel part and a tooth parallel part provided on a back surface of the tooth end surface covering part on the tooth side and concave in a direction away from the axial end surface of the tooth.
    Type: Application
    Filed: March 16, 2022
    Publication date: April 25, 2024
    Applicant: MITSUBA Corporation
    Inventors: KOJI YONEKAWA, TAKESHI KANAI, RYO OHORI, YUKARI OTSUKA
  • Publication number: 20240128818
    Abstract: A rotor core includes: a plurality of salient poles that protrude outward in a radial direction from a rotor core main body portion and are arranged between magnets which are adjacent to each other in a circumferential direction, a holder includes: an annular portion that is arranged to overlap an end surface in an axial direction of the rotor core main body portion; and a leg portion that protrudes outward in a radial direction from the annular portion and is arranged to overlap an end surface in an axial direction of the salient poles, and a press fit rib in which a magnet cover is pressed into the leg portion is provided on an outer end section in a radial direction of the leg portion.
    Type: Application
    Filed: March 4, 2022
    Publication date: April 18, 2024
    Inventors: Ryo Ohori, Takeshi Kanai
  • Patent number: 11955844
    Abstract: A rotor is provided with: a rotor core (32); a plurality of permanent magnets (33); a substantially tubular magnet cover (71); and a load reception block (70). The rotor core (32) rotates integrally with a rotary shaft of a motor. The permanent magnets (33) are arranged on the outer peripheral part of the rotor core (32). The magnet cover (71) covers the exterior of the plurality of permanent magnets (33) and the rotor core (32), and has a flange part which is bent radially inward at the end along a rotation axis. The load reception block (70) is disposed between the flange part and the end surface of the rotor core (32) in a direction along the rotation axis, and abuts against the flange part and the rotor core (32).
    Type: Grant
    Filed: November 11, 2019
    Date of Patent: April 9, 2024
    Assignee: MITSUBA Corporation
    Inventors: Ryo Ohori, Koji Yonekawa, Takeshi Kanai
  • Publication number: 20230105551
    Abstract: A semiconductor device according to one embodiment includes a stacked body including first films and second films that are stacked alternatively one on another, the stacked body having a stair shape at end portions thereof; a thick film portion thicker than the second films within the stacked body and provided on an upper surface of a first step of the stair shape; a separating portion provided on a side face between the first step and a second step one-step above the first step, the separating portion separating the thick film portion from the side surface; a third film provided to cover the stacked body and the thick film portion; and an electrically conductive column portion penetrating through the third film to be in contact with the thick film portion.
    Type: Application
    Filed: December 9, 2022
    Publication date: April 6, 2023
    Applicant: Kioxia Corporation
    Inventor: Ryo KANAI
  • Publication number: 20210296356
    Abstract: A semiconductor device according to one embodiment includes a stacked body including first films and second films that are stacked alternatively one on another, the stacked body having a stair shape at end portions thereof; a thick film portion thicker than the second films within the stacked body and provided on an upper surface of a first step of the stair shape; a separating portion provided on a side face between the first step and a second step one-step above the first step, the separating portion separating the thick film portion from the side surface; a third film provided to cover the stacked body and the thick film portion; and an electrically conductive column portion penetrating through the third film to be in contact with the thick film portion.
    Type: Application
    Filed: September 11, 2020
    Publication date: September 23, 2021
    Applicant: Kioxia Corporation
    Inventor: Ryo KANAI
  • Patent number: 10863629
    Abstract: A method of manufacturing a through hole of a substrate includes forming, to the substrate, a cutting hole surrounding a removal-target-part such that a connection part of the substrate remains, the connection part that connects the removal-target-part that is removed from the substrate and a remaining part other than the removal-target-part that has been removed, along a cutting line of the through hole formed to the substrate; applying plating on an area including an inner peripheral wall face of the cutting hole of the substrate; applying a film covering an opening of the cutting hole on a surface of the substrate applied with the plating and performing exposure and development of the film to form an etching resist covering an area including the opening of the cutting hole; performing etching of the plating applied on the substrate; removing the etching resist; and cutting the connection part to remove the removal-target-part.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: December 8, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Kiyoyuki Hatanaka, Shigeru Sugino, Takahiro Kitagawa, Ryo Kanai, Nobuo Taketomi, Mitsunori Abe
  • Patent number: 10624216
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: April 14, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Patent number: 10605851
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: March 31, 2020
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Publication number: 20200037452
    Abstract: A method of manufacturing a through hole of a substrate includes forming, to the substrate, a cutting hole surrounding a removal-target-part such that a connection part of the substrate remains, the connection part that connects the removal-target-part that is removed from the substrate and a remaining part other than the removal-target-part that has been removed, along a cutting line of the through hole formed to the substrate; applying plating on an area including an inner peripheral wall face of the cutting hole of the substrate; applying a film covering an opening of the cutting hole on a surface of the substrate applied with the plating and performing exposure and development of the film to form an etching resist covering an area including the opening of the cutting hole; performing etching of the plating applied on the substrate; removing the etching resist; and cutting the connection part to remove the removal-target-part.
    Type: Application
    Filed: July 17, 2019
    Publication date: January 30, 2020
    Applicant: FUJITSU LIMITED
    Inventors: Kiyoyuki Hatanaka, Shigeru Sugino, Takahiro Kitagawa, Ryo Kanai, Nobuo Taketomi, Mitsunori Abe
  • Patent number: 10393797
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: August 27, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Patent number: 10342129
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: July 2, 2019
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro Kitagawa, Mitsunori Abe, Shigeru Sugino, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20190110365
    Abstract: A wiring board includes, a base plate that has a first surface, a second surface opposite to the first surface, and a side surface coupled to the first surface and the second surface, a conductor provided on the side surface, and a protrusion provided over the side surface. The protrusion partitions the conductor into a first portion on the side surface that extends to the first surface and a second portion on the side surface that extends to the second surface. The protrusion has a solder wettability lower than the conductor and protrudes from the conductor.
    Type: Application
    Filed: October 3, 2018
    Publication date: April 11, 2019
    Applicant: FUJITSU LIMITED
    Inventors: Nobuo Taketomi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Kiyoyuki Hatanaka, Shigeo Iriguchi, Ryo Kanai
  • Publication number: 20180310405
    Abstract: A substrate includes an insulation layer including a glass cloth impregnated with a resin, and a through hole having a hole included in the insulation layer and plating formed in an inner surface of the hole, where a location, intersecting with the glass cloth, of an outer circumferential portion of the through hole has a recessed portion recessed toward an outside of the hole.
    Type: Application
    Filed: April 5, 2018
    Publication date: October 25, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Takahiro KITAGAWA, Mitsunori Abe, Shigeru SUGINO, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Publication number: 20180059170
    Abstract: A method for inspecting a laminated board, includes: performing a reflow process to solder an electronic component to a surface of a laminated board in which at least one of a plurality of wiring layers which are laminated with each other is coupled to another adjacent wiring layer via a via; and inspecting, in the reflow process, a conduction state of the via after a temperature of the laminated board reaches a melting point of a solder, and when the temperature of the laminated board is at a temperature range lower than the melting point and higher than room temperature.
    Type: Application
    Filed: June 15, 2017
    Publication date: March 1, 2018
    Applicant: FUJITSU LIMITED
    Inventors: Mitsunori ABE, Takahiro Kitagawa, Shigeo Iriguchi, Kiyoyuki Hatanaka, Shigeru Sugino, Ryo Kanai
  • Publication number: 20170285096
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Application
    Filed: June 16, 2017
    Publication date: October 5, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo IRIGUCHI, Naoki NAKAMURA, Shigeru SUGINO, Takahide MUKOYAMA, Ryo KANAI, Nobuo TAKETOMI, Kiyoyuki HATANAKA
  • Patent number: 9709619
    Abstract: A printed wiring board includes: a laminated body that has a plurality of wiring layers laminated therein; a first through hole that electrically connects two or more wiring layers with each other; and a second through hole that has strength to expansion and contraction of the laminated body less than in the first through hole.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: July 18, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Shigeo Iriguchi, Naoki Nakamura, Shigeru Sugino, Takahide Mukoyama, Ryo Kanai, Nobuo Taketomi, Kiyoyuki Hatanaka
  • Publication number: 20170196077
    Abstract: A rigid flexible board includes: a substrate that has flexibility and electric insulation; a protective layer formed at a central portion of each of opposite surfaces of the substrate; and a plurality of core layers partially covering the protective layer and formed at a circumferential edge of each of the opposite surfaces of the substrate; wherein a gap is formed close to a center of the substrate in a thickness direction thereof between the core layers and the protective layer.
    Type: Application
    Filed: December 12, 2016
    Publication date: July 6, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Shigeo IRIGUCHI, Naoki Nakamura, Mitsunori Abe, Nobuo Taketomi, Kiyoyuki Hatanaka, Ryo Kanai
  • Patent number: 9591763
    Abstract: Disclosed substrate with embedded component includes: an insulating base member; a conductive pad formed on the insulating base member; a component connected to the conductive pad with a solder; and a resin covering the component, wherein a hole is provided in the insulating base member and the conductive pad, and the insulating base member is exposed on a side surface of the hole.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: March 7, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Kiyoyuki Hatanaka, Nobuo Taketomi, Shigeo Iriguchi, Ryo Kanai, Naoki Nakamura
  • Publication number: 20160324005
    Abstract: Disclosed substrate with embedded component includes: an insulating base member; a conductive pad formed on the insulating base member; a component connected to the conductive pad with a solder; and a resin covering the component, wherein a hole is provided in the insulating base member and the conductive pad, and the insulating base member is exposed on a side surface of the hole.
    Type: Application
    Filed: March 14, 2016
    Publication date: November 3, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Mitsunori Abe, Kiyoyuki Hatanaka, Nobuo Taketomi, Shigeo Iriguchi, Ryo Kanai, Naoki Nakamura
  • Patent number: 9295155
    Abstract: A flexible printed board includes a base material, first conductive pads arranged along an imaginary line on the base material and extending with a first width from front end to rear end on a front side of the imaginary line, second conductive pads arranged along the imaginary line and extending with a second width from front end on a rear side of the imaginary line to rear end, first wiring patterns provided between the second conductive pads, and extending with a third width to front end connected to the rear ends of the first conductive pads, and a reinforcing layer for reinforcing a reinforcing area over the first conductive pads and the first wiring patterns, and having a front edge on a front side of rear ends of the first conductive pads and a rear edge on a rear side of the rear ends of the second conductive pads.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: March 22, 2016
    Assignee: FUJITSU LIMITED
    Inventors: Naoki Nakamura, Shigeru Sugino, Nobuo Taketomi, Ryo Kanai