Abstract: A multiple network protocol encoder/decoder comprising a network protocol layer, data handler, O.S. State machine, and memory manager state machines implemented at a hardware gate level. Network packets are received from a physical transport level mechanism by the network protocol layer state machine which decodes network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, and Raw Socket concurrently as each byte is received. Each protocol handler parses and strips header information immediately from the packet, requiring no intermediate memory. The resulting data are passed to the data handler which consists of data state machines that decode data formats such as email, graphics, Hypertext Transfer Protocol (HTTP), Java, and Hypertext Markup Language (HTML).

Abstract: An graphics/audio controller system supports the delivery of digital audio signals in a graphics controller architecture so that much of the video circuitry can also be used to process audio information. The graphics/audio controller may be implemented to accommodate either asynchronous or synchronous audio access. A memory control unit is incorporated to receive audio and video data request signals and to correspondingly access the required data from a memory section. Digital audio and video signals are provided at an output bus of the memory section and are converted to analog signals by one or more digital to analog converters. As a result of the graphics/audio controller system, efficient audio reproduction is supported while minimizing hardware requirements. In addition, the overall size and cost of the system is minimized.