Abstract: A stator includes: a stator core having a plurality of tooth parts extending in a radial fashion; insulators formed of resin and mounted to the stator core; and coil winding parts each of which is wound on a corresponding one of the tooth parts of the stator core via a corresponding one of the insulators. Moreover, between the stator core and each of the coil winding parts, there is provided an insulating layer that has a lower permittivity than the insulators.

Abstract: A rotor includes a rotor core, a first balancing weight, and a second balancing weight. The first balancing weight is provided on an end surface on one side in an axial direction of the rotor core. The second balancing weight is provided on an end surface on another side in the axial direction of the rotor core.

Abstract: A stator includes a stator core, a plurality of coils, a second terminal having a crimp part, a first lead wire, and a second lead wire. The first lead wire is formed of a part of a winding that forms a specific coil among the plurality of coils. Moreover, the first lead wire is routed from the specific coil to the crimp part and has a connection portion connected to the crimp part. The second lead wire is formed of another part of the winding that forms the specific coil. Moreover, the second lead wire is routed from the specific coil toward an opposite side to the first lead wire and connects between the specific coil and another one of the plurality of coils.

Abstract: A stator is provided which includes, a stator core which includes teeth, an insulator, a plurality of coils each of which is made of a winding of a conductive wire around a respective one of the teeth, and a terminal. The first terminal is made from elastic conductive material and includes a first insulator retainer, a first connector, and a second connector. The first connector extends from the first insulator retainer and includes a crimp to which a coil end of the coils is secured. The second connector includes a power supply connector which extends from the first insulator retainer and is connected to a power supply connector leading to a power supply. The second connector also includes a first bend and a second bend on which mechanical stress is exerted with the power supply connector being connected to the power supply.

Abstract: A stator includes a stator core, an insulator, and a plurality of coils. The stator core is equipped with teeth which are arranged away from each other in a circumferential direction of the stator. The insulator is secured to the stator core. The coils are made of windings of conductive wires around the teeth. The stator also includes terminals (i.e., first terminals and a second terminal). The terminals include insulator retainers (i.e., first insulator retainers and a second insulator retainer) and crimps. The insulator retainers are secured to the insulator. Each of the crimps is disposed between two of the coils which are arranged adjacent to each other in the circumferential direction. Ends of the coils (i.e., first ends and second ends) are secured to the crimps.

Abstract: A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.

Abstract: A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.

Abstract: A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.

Abstract: A semiconductor integrated circuit device includes first and second nonvolatile semiconductor memories. The first memory has first and second select transistors and first memory cell transistors. The first memory cell transistor has a first floating gate on a first gate insulating film and a first control gate on a first inter-gate insulating film. The second memory has a third select transistor and a second memory cell transistor. The second memory cell transistor has a second floating gate on a second gate insulating film and a second control gate on a second inter-gate insulating film. The first and second gate insulating films have the same film thickness. The first and second floating gates have the same film thickness. The first and second inter-gate insulating films have the same film thickness. The first and second control gates have the same film thickness.

Abstract: A data transfer control device is provided having a plurality of shift registers connected through said multiplexers in a closed loop, a selector connected to the inputs of said multiplexer and for selecting a transfer destination of display data according to a common electrode select signal of a display unit, and a gate for selecting the polarity of the display data to be loaded into said shift registers according to the polarity of common output signals for scanning common electrodes of said display unit.

Abstract: A liquid crystal driver circuit has first to fourth resistors serially connected between a positive power source terminal and a reference power source terminal, first and second MOS transistors respectively connected in parallel with the first and fourth resistors, a common electrode driver circuit for generating common electrode bias signals in accordance with common electrode selection signals, and a segment electrode driver circuit for generating segment electrode bias signals in accordance with segment data. A third switching MOS transistor is coupled between the reference power source terminal and the series circuit of the first to fourth resistors.

Abstract: A power source voltage change discrimination circuit includes a voltage selection circuit for selectively supplying the greater one of main and auxiliary power source voltages, and a series circuit of a resistor and a capacitor coupled between the output terminal of the voltage selection circuit and ground. There is further provided a Schmitt circuit having hysteresis characteristics whose input terminal is coupled to a junction of the resistor and capacitor.