Abstract: A natural invasion promoting method that is environmentally friendly, easy to carry out, can cope with a wide range of areas and inclined surfaces, achieves efficient natural invasion, and can satisfactorily promote greening on a soil surface of interest, and a spraying material used in the method are provided. A natural invasion promoting method including: spraying a spraying material containing live algae on a soil surface; breeding the live algae; and also directly or indirectly catching flying seeds or spores by a tacky substance secreted on surfaces of the live algae or a catching structure composed of the live algae to promote greening on the soil surface.

Abstract: A control device includes: an acquisition unit configured to acquire, from a driving assist system, a requested acceleration and ending information indicating an end of a deceleration control; and a control unit configured to control a powertrain and a brake based on the requested acceleration, and perform a prescribed process of stabilizing a driving force and a braking force that are generated in an ending process of the deceleration control based on the requested acceleration when the acquisition unit acquires the ending information.

Abstract: An antenna module including a dielectric substrate having a long side and a short side, a ground electrode, a radiating element, a peripheral electrode, and a parasitic element. The radiating element is disposed to face the ground electrode. The peripheral electrode is disposed along the long side of the dielectric substrate and is electrically connected to the ground electrode. The parasitic element is disposed along the short side of the dielectric substrate and is disposed away from the radiating element. The radiating element is configured to emit radio waves in two polarization directions along the long side and the short side of the dielectric substrate. The shortest distance between the radiating element and the parasitic element is greater than the shortest distance between the radiating element and the peripheral electrode.

Abstract: Disclosed is a charge transfer complex capable of obtaining a curable resin composition having an excellent balance between curability and storage stability when used as an epoxy-resin curing agent. The charge transfer complex has an imidazole moiety as an electron donor moiety. The charge transfer complex may be an assembly wherein electrons included in a compound (a) having an imidazole moiety are accepted by a compound (b) having an electron acceptor moiety, or may be a compound having an imidazole moiety and an electron acceptor moiety in its molecule, and the electron acceptor moiety accepts electrons included in the imidazole moiety.

Abstract: A learning device includes an acquisition unit that acquires a local model corresponding to a feature value held by the own device, a residual calculation unit that calculates a difference between an output of a vertical federated learning model having been learned previously and an output of the local model acquired by the acquisition unit, and an additional tree learning unit that learns an additional tree to be added to the local model acquired by the acquisition unit, on the basis of the result of calculation by the residual calculation unit and the feature value held by the own device.

Abstract: A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.

Abstract: A semiconductor device includes: a plurality of cores configured to receive power from a power supply; a plurality of power switch circuits provided for each core and configured to control the power supplied to the corresponding cores; a compare circuit configured to receive power from the power supply and compare output data of the plurality of cores; and a core voltage monitor circuit configured to monitor a voltage of a node that connects the power supply and the compare circuit.

Abstract: A semiconductor device includes a voltage sensor which samples a power supply voltage at a speed faster than fluctuations in the power supply voltage and encodes the power supply voltage into a voltage code value. A voltage drop determination circuit detects a voltage drop based on the voltage code value, and a clock control circuit generates a clock. The clock control circuit stops the clock when the voltage drop determination circuit detects the voltage drop. The voltage drop determination circuit includes a prediction computation circuit which looks ahead a voltage value from a history of the voltage code value and predicts a variation value, and the prediction computation circuit includes a circuit for masking a prediction value if a differential value of the prediction value is continuously negative for a predetermined cycle.

Abstract: A position identification unit (110) maps a plurality of tumor sample reads to a human genome sequence, and identifies, for each target gene, a target position which is a genome position of a base, the genome position having changed with respect to the human genome sequence. A frequency calculation unit (120) calculates a variant allele frequency for each target position of each target gene. A distance calculation unit (130) calculates, for each target gene, a feature distance equivalent to a difference between a variant allele frequency corresponding to a peak density and a reference variant allele frequency in a density distribution indicating a density of the number of mapping reads with respect to the variant allele frequency. A coefficient calculation unit (140) calculates a correction coefficient using the feature distance of each target gene.

Abstract: A semiconductor device includes a voltage sensor which samples a power supply voltage at a speed faster than fluctuations in the power supply voltage and encodes the power supply voltage into a voltage code value. A voltage drop determination circuit detects a voltage drop based on the voltage code value, and a clock control circuit generates a clock. The clock control circuit stops the clock when the voltage drop determination circuit detects the voltage drop. The voltage drop determination circuit includes a prediction computation circuit which looks ahead a voltage value from a history of the voltage code value and predicts a variation value, and the prediction computation circuit includes a circuit for masking a prediction value if a differential value of the prediction value is continuously negative for a predetermined cycle.

Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.

Abstract: A semiconductor device capable of controlling a memory while preventing the functional deterioration of the memory and reducing the power consumption of the semiconductor device is provided. The semiconductor device includes a first semiconductor chip (logic chip) and a second semiconductor chip (memory chip). The first semiconductor chip includes a plurality of temperature sensors disposed in mutually different places, and a memory controller that controls each of a plurality of memory areas provided in the second semiconductor chip based on output results of a respective one of the plurality of temperature sensors.

Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.

Abstract: There is provided a semiconductor device that can follow a fast voltage change such as a large voltage drop occurring at the time of rapid load fluctuation. The semiconductor device includes a voltage sensor which monitors a power supply voltage at a sampling speed higher than the assumed frequency of power supply voltage fluctuation and outputs a voltage code value, a voltage drop determination circuit which determines, from the voltage code value, that a voltage drop causing a malfunction of a system occurs, and outputs a clock stop signal, and a clock control circuit which controls clock stop, restart, and frequency change.

Abstract: A semiconductor device capable of controlling a memory while preventing the functional deterioration of the memory and reducing the power consumption of the semiconductor device is provided. The semiconductor device includes a first semiconductor chip (logic chip) and a second semiconductor chip (memory chip). The first semiconductor chip includes a plurality of temperature sensors disposed in mutually different places, and a memory controller that controls each of a plurality of memory areas provided in the second semiconductor chip based on output results of a respective one of the plurality of temperature sensors.

Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.

Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.

Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.

Abstract: A semiconductor device includes a substrate including a circuit region where a circuit element is formed, a multilayer wiring layer that is formed on the substrate and composed of a plurality of wiring layers and a plurality of via layers that are laminated, and an electrode pad that is formed on the multilayer wiring layer. An interlayer insulating film is formed in a region of a first wiring layer that is a top layer of the plurality of wiring layers, in the region the electrode pad and the first circuit region overlapping each other in a planar view of the electrode pad.

Abstract: Efficient reduction in power consumption is achieved by combinational implementation of a power cutoff circuit technique using power supply switch control and a DVFS technique for low power consumption. A power supply switch section fed with power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in a DEEP-NWELL region formed over a semiconductor substrate. Another power supply switch section fed with another power supply voltage, a circuit block in which a power cutoff is performed by the power supply switch section, and a level shifter are formed in another DEEP-NWELL region formed over the semiconductor substrate. In this arrangement, there arises no possibility of short-circuiting between different power supplies via each DEEP-NWELL region formed over the semiconductor substrate.