Patents by Inventor Ryo Nakagaki
Ryo Nakagaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8355559Abstract: Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.Type: GrantFiled: April 23, 2009Date of Patent: January 15, 2013Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara, Atsushi Miyamoto
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Publication number: 20120257041Abstract: Provided is a technique for a wafer inspection conducted by simple operation, which is useful even when the inspection covers a variety of items and the inspection items are changed frequently with time like in a start-up period of a semi-conductor process. According to the technique, inspection images are collected, and then a template is prepared from the inspection images. A plurality of regions are defined on the template, and inspection methods and output indexes are registered in correspondence with the respective regions. In the inspection, by reference to the template images corresponding to the derived inspection images, the inspection is conducted based on the inspection information registered therein and the quantitative output levels are calculated.Type: ApplicationFiled: November 22, 2010Publication date: October 11, 2012Inventors: Ryo Nakagaki, Minoru Harada, Takehiro Hirai, Yuji Takagi
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Publication number: 20120128233Abstract: In apparatuses for automatically acquiring and also for automatically classifying images of defects present on a sample such as a semiconductor wafer, a classifying system is provided which are capable of readily accepting even such a case that a large number of classification classes are produced based upon a request issued by a user, and also even such a case that a basis of the classification class is changed in a high frequency. When the user defines the classification classes, a device for designating attributes owned by the respective classification classes is provided. The classifying system automatically changes a connecting mode between an internally-provided rule-based classifier and an example-based classifier, so that such a classifying system which is fitted to the classification basis of the user is automatically constructed.Type: ApplicationFiled: January 31, 2012Publication date: May 24, 2012Inventors: Ryo NAKAGAKI, Masaki Kurihara, Toshifumi Honda
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Patent number: 8150141Abstract: In apparatuses for automatically acquiring and also for automatically classifying images of defects present on a sample such as a semiconductor wafer, a classifying system is provided which are capable of readily accepting even such a case that a large number of classification classes are produced based upon a request issued by a user, and also even such a case that a basis of the classification class is changed in a high frequency. When the user defines the classification classes, a device for designating attributes owned by the respective classification classes is provided. The classifying system automatically changes a connecting mode between an internally-provided rule-based classifier and an example-based classifier, so that such a classifying system which is fitted to the classification basis of the user is automatically constructed.Type: GrantFiled: July 15, 2011Date of Patent: April 3, 2012Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Masaki Kurihara, Toshifumi Honda
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Patent number: 8121397Abstract: A method for reviewing a defect on a sample involves the steps of imaging a defect image containing the defect in first magnification by using an image acquisition unit, synthesizing a reference image not containing the defect from the defect image, comparing the defect image acquired with the reference image synthesized to detect a defect applicant, executing a processing for classifying the defect applicant into a defect and a normal portion and imaging only the portion identified as the detect in second magnification. The method makes it possible to specify a defect position without error from the image taken in the first magnification and to image the defect in the second magnification when a large number of defects are observed within a short time by using the image acquisition unit.Type: GrantFiled: April 1, 2009Date of Patent: February 21, 2012Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara
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Patent number: 8090190Abstract: An apparatus for reviewing defects including an image processing section (defect classification device section) with a function of estimating a non-defective state (reference image) of a portion in which the defect exists by use of a defect image, and a function of judging criticality or non-flat state of the defect by use of the estimation result. It becomes possible to establish both of a high-throughput image collecting sequence in which any reference image is not acquired and high-precision defect classification, and then to realize both of a high performance classifying function and a high-throughput image collecting function in a defect reviewing apparatus which automatically collects and classifies images of defects existing on a sample of a semiconductor wafer or the like.Type: GrantFiled: January 27, 2010Date of Patent: January 3, 2012Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Toshifumi Honda
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Publication number: 20110299760Abstract: Provided is a defect observation apparatus capable of analyzing a structure such as an arrangement and a vertical relationship of a circuit pattern formed by using design information of a sample, creating a non-defective product image from a defect image based on the analysis results, and detecting a defect by comparative inspection.Type: ApplicationFiled: December 21, 2009Publication date: December 8, 2011Inventors: Minoru Harada, Ryo Nakagaki, Kenji Obara
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Publication number: 20110285839Abstract: An imaging region of a high-magnification reference image capable of being acquired in a low-magnification field without moving a stage from a position at which a defective region has been imaged at a low magnification is searched for and if the search is successful, an image of the imaging region itself is acquired and the high-magnification reference image is acquired. If the search is unsuccessful, the imaging scheme is switched to that in which the high-magnification reference image is acquired from a chip adjacent to the defective region.Type: ApplicationFiled: November 27, 2009Publication date: November 24, 2011Applicant: Hitachi High-Technologies CorporationInventors: Go Kotaki, Atsushi Miyamoto, Ryo Nakagaki, Takehiro Hirai
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Publication number: 20110268345Abstract: In apparatuses for automatically acquiring and also for automatically classifying images of defects present on a sample such as a semiconductor wafer, a classifying system is provided which are capable of readily accepting even such a case that a large number of classification classes are produced based upon a request issued by a user, and also even such a case that a basis of the classification class is changed in a high frequency. When the user defines the classification classes, a device for designating attributes owned by the respective classification classes is provided. The classifying system automatically changes a connecting mode between an internally-provided rule-based classifier and an example-based classifier, so that such a classifying system which is fitted to the classification basis of the user is automatically constructed.Type: ApplicationFiled: July 15, 2011Publication date: November 3, 2011Inventors: Ryo NAKAGAKI, Masaki Kurihara, Toshifumi Honda
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Publication number: 20110261190Abstract: A review SEM is provided with a means to store sets of images acquired using multiple imaging conditions or sets of images for which multiple imaging conditions are simulated using simulation, a means to store defect position information for each set of images, and a means to store information relating to imaging conditions and process time. A means to estimate predicted capture rate and throughput with the individual imaging conditions for the sets of images from the stored information, and a means to display the results thereof are additionally provided.Type: ApplicationFiled: September 28, 2009Publication date: October 27, 2011Inventors: Ryo Nakagaki, Minoru Harada, Kenji Obara
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Patent number: 7991217Abstract: In apparatuses for automatically acquiring and also for automatically classifying images of defects present on a sample such as a semiconductor wafer, a classifying system is provided which are capable of readily accepting even such a case that a large number of classification classes are produced based upon a request issued by a user, and also even such a case that a basis of the classification class is changed in a high frequency. When the user defines the classification classes, a device for designating attributes owned by the respective classification classes is provided. The classifying system automatically changes a connecting mode between an internally-provided rule-based classifier and an example-based classifier, so that such a classifying system which is fitted to the classification basis of the user is automatically constructed.Type: GrantFiled: February 9, 2007Date of Patent: August 2, 2011Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Masaki Kurihara, Toshifumi Honda
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Publication number: 20110102573Abstract: A method and apparatus for reviewing defects of a semiconductor device is provided which involves detecting a defect on a SEM image taken at low magnification, and reviewing the defect on a SEM image taken at high magnification, and which can review a lot of defects in a short period of time thereby to improve the efficiency of defect review. In the present invention, the method for reviewing defects of a semiconductor device includes the steps of obtaining an image including a defect on the semiconductor device detected by a detection device by use of a scanning electron microscope at a first magnification, making a reference image from the image including the defect obtained at the first magnification, detecting the defect by comparing the image including the defect obtained at the first magnification to the reference image made from the image including the defect at the first magnification, and taking an image of the detected defect at a second magnification that is larger than the first magnification.Type: ApplicationFiled: January 7, 2011Publication date: May 5, 2011Inventors: Masaki KURIHARA, Toshifumi Honda, Ryo Nakagaki
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Patent number: 7932493Abstract: It is intended to reduce the auto focusing time and to increase the stability in a case that a defect on a specimen that has been detected by an inspection apparatus is observed by using a scanning electron microscope. One or more regions to be used for auto focusing are set in an imaging region or its neighborhood on the basis of semiconductor design information. A target focusing position in the imaging region is determined by performing auto focusing using the thus-set regions. The determined target focusing position is used for low-magnification imaging and high-magnification imaging. An auto focusing mode that is suitable for each imaging region is selected on the basis of the semiconductor design information.Type: GrantFiled: May 16, 2008Date of Patent: April 26, 2011Assignee: Hitachi High-Technologies CorporationInventors: Minoru Harada, Ryo Nakagaki, Kenji Obara
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Patent number: 7873202Abstract: An apparatus for reviewing defects of a semiconductor device is provided to review a lot of defects in a short period of time thereby to improve the efficiency of defect review. A method for reviewing defects of a semiconductor device includes obtaining an image including a defect on the semiconductor device detected by a detection device by use of a scanning electron microscope at a first magnification, making a reference image from the image including the defect obtained at the first magnification, detecting the defect by comparing the image including the defect obtained at the first magnification to the reference image made from the image including the defect at the first magnification, and taking an image of the detected defect at a second magnification that is larger than the first magnification.Type: GrantFiled: July 19, 2006Date of Patent: January 18, 2011Assignee: Hitachi High-Technologies CorporationInventors: Masaki Kurihara, Toshifumi Honda, Ryo Nakagaki
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Patent number: 7834317Abstract: A scanning electron microscope has an electron source for illuminating a primary electron beam on a specimen wafer, an accelerating electrode, a condenser lens, a deflector, an objective lens, a detector for acquiring a digital image by sampling a signal of emissive electrons generated from the specimen wafer, a digitizing means, an image memory for storing, displaying or processing the acquired digital image, an input/output unit, an image creation unit and an image processor. The scanning electron microscope is provided with a sampling unit for sampling the emissive electron signal at intervals each smaller than the pixel size of the digital image to be stored, displayed or processed and an image creation process means for enlarging the pixel size on the basis of the sampled emissive electron signal to create a digital image.Type: GrantFiled: November 8, 2005Date of Patent: November 16, 2010Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Toshifumi Honda
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Publication number: 20100128970Abstract: An apparatus for reviewing defects including an image processing section (defect classification device section) with a function of estimating a non-defective state (reference image) of a portion in which the defect exists by use of a defect image, and a function of judging criticality or non-flat state of the defect by use of the estimation result. It becomes possible to establish both of a high-throughput image collecting sequence in which any reference image is not acquired and high-precision defect classification, and then to realize both of a high performance classifying function and a high-throughput image collecting function in a defect reviewing apparatus which automatically collects and classifies images of defects existing on a sample of a semiconductor wafer or the like.Type: ApplicationFiled: January 27, 2010Publication date: May 27, 2010Inventors: Ryo NAKAGAKI, Toshifumi Honda
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Patent number: 7657078Abstract: An apparatus for reviewing defects including an image processing section (defect classification device section) with a function of estimating a non-defective state (reference image) of a portion in which the defect exists by use of a defect image, and a function of judging criticality or non-flat state of the defect by use of the estimation result. It becomes possible to establish both of a high-throughput image collecting sequence in which any reference image is not acquired and high-precision defect classification, and then to realize both of a high performance classifying function and a high-throughput image collecting function in a defect reviewing apparatus which automatically collects and classifies images of defects existing on a sample of a semiconductor wafer or the like.Type: GrantFiled: December 20, 2005Date of Patent: February 2, 2010Assignee: Hitachi High-Technologies CorporationInventors: Ryo Nakagaki, Toshifumi Honda
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Publication number: 20090268959Abstract: Disclosed is a method for reviewing defects in a large number of samples within a short period of time through the use of a defect review apparatus. To collect defect images steadily and at high throughput, a defect detection method is selected before imaging and set up for each of review target defects in the samples in accordance with the external characteristics of the samples that are calculated from the design information about the samples. The defect images are collected after an imaging sequence is set up for the defect images and reference images in such a manner as to reduce the time required for stage movement in accordance with the defect coordinates of the samples and the selected defect detection method.Type: ApplicationFiled: April 23, 2009Publication date: October 29, 2009Inventors: Minoru Harada, Ryo Nakagaki, Kenji Obara, Atsushi Miyamoto
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Publication number: 20090252403Abstract: A method for reviewing a defect on a sample involves the steps of imaging a defect image containing the defect in first magnification by using an image acquisition unit, synthesizing a reference image not containing the defect from the defect image, comparing the defect image acquired with the reference image synthesized to detect a defect applicant, executing a processing for classifying the defect applicant into a defect and a normal portion and imaging only the portion identified as the detect in second magnification. The method makes it possible to specify a defect position without error from the image taken in the first magnification and to image the defect in the second magnification when a large number of defects are observed within a short time by using the image acquisition unit.Type: ApplicationFiled: April 1, 2009Publication date: October 8, 2009Inventors: Minoru Harada, Ryo Nakagaki, Kenji Obara
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Patent number: 7598490Abstract: In order to achieve high throughput in a SEM-type defect-reviewing apparatus and method for automatically acquiring images of review defects present on samples, including: a cell comparison step subdivided into the steps of (a) providing a defect detection success ratio or defect detection success map due to at least a cell comparison scheme for each wafer or each chip, (b) selecting a review sequence of either the cell comparison scheme or a die comparison scheme on the basis of the provided defect detection success ratio or defect detection success map, (c) if the cell comparison scheme is selected, judging whether detection of the review defect is possible by executing the cell comparison scheme; and a die comparison step in which die comparison is performed if the judgment result indicates that the detection of the review defect is impossible, or if the die comparison scheme is selected in the selection step.Type: GrantFiled: May 11, 2007Date of Patent: October 6, 2009Assignee: Hitachi High-Technologies CorporationInventors: Masaki Kurihara, Toshifumi Honda, Ryo Nakagaki